PTMC210404MD
Wideband LDMOS Two-stage Integrated Power Amplifier
2 x 20 W, 28 V, 1805 – 2200 MHz
Description
The PTMC210204MD is a wideband, two-stage LDMOS integrated
amplifier intended for wideband driver applications. It has internal
matching for operation from 1805 to 2200 MHz. It features on-chip
Package PG-HB1DSO-14-1
(formed leads)
matching high efficiency, and dual independent outputs with 20 W of
output power each. It is available in a 14-lead plastic overmold pack-
age with gull wing leads.
Features
Single-carrier WCDMA Drive-up
VDD = 28 V, IDQ1 = 124mA, IDQ2 = 438 mA,
ƒ = 1990 MHz 3GPP WCDMA signal,
PAR = 7.50 dB, 3.84 MHz BW
•ꢀ On-chip matching for broadband operation
•ꢀ Typical pulsed CW performance, 1990 MHz, 28 V,
combined outputs
40
30
20
10
0
60
45
30
15
0
- Output power at P
- Linear Gain = 31.5 dB
- Efficiency = 53.1%
= 37 W
1dB
•ꢀ Capable of handling 10:1 VSWR @28 V, 37 W (CW)
Efficiency
Gain
output power
•ꢀ Integrated ESD protection
PAR @ 0.01%
CCDF
•ꢀ Human Body Model Class 1B (per ANSI/ESDA/
JEDEC JS-001)
•ꢀ Integrated temperature compensation
•ꢀ Pb-free and RoHS compliant
ptmc210404md-g1
32
37
42
47
Average Output Power (dBm)
RF Characteristics
Single-carrier WCDMA Specifications (tested in Wolfspeed production test fixture)
= 28 V, I = 63 mA, I = 219 mA, P = 5 W avg, ƒ = 1990 MHz, 3GPP WCDMA signal, channel band-
V
DD
DQ1(A+B)
DQ2(A+B)
OUT
width = 3.84 MHz, peak/average = 7.5 dB @ 0.01% CCDF
Characteristic
Symbol
Min
29
Typ
30
Max
—
Unit
dB
Linear Gain
G
ps
Power Added Efficiency
Adjacent Channel Power Ratio
Output PAR @ 0.01% CCDF
PAE
17.5
—
18.5
–49.5
7.2
—
%
ACPR
OPAR
–47.5
—
dBc
dB
7.0
All published data at T
= 25°C unless otherwise indicated
CASE
ESD: Electrostatic discharge sensitive device—observe handling precautions!
Rev. 03, 2018-05-21
4600 Silicon Drive
|
Durham, NC 27703
|
www.wolfspeed.com