Introduction
— FlexRay module (V2.1) with dual channel, up to 128 message objects and up to 10 Mbit/s
— Fast Ethernet Controller (FEC)
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— 3 I C modules
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Four 12-bit analog-to-digital converters (ADCs)
— 22 input channels
— Programmable cross triggering unit (CTU) to synchronize ADC conversion with timer and
PWM
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External bus interface
16-bit external DDR memory controller
Parallel digital interface (PDI)
On-chip CAN/UART bootstrap loader
Capable of operating on a single 3.3 V voltage supply
— 3.3 V-only modules: I/O, oscillators, flash memory
— 3.3 V or 5 V modules: ADCs, supply to internal VREG
— 1.8–3.3 V supply range: DRAM/PDI
Operating junction temperature range –40 to 150 °C
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1.5
Feature details
1.5.1
High-performance e200z7d core processor
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Dual 32-bit Power Architecture processor core
Loose or tight core coupling
Freescale Variable Length Encoding (VLE) enhancements for code size footprint reduction
Thirty-two 64-bit general-purpose registers (GPRs)
Memory management unit (MMU) with 64-entry fully-associative translation look-aside buffer
(TLB)
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Branch processing unit
Fully pipelined load/store unit
16 KB Instruction and 16 KB Data caches per core with line locking
— Four way set associative
— Two 32-bit fetches per clock
— Eight-entry store buffer
— Way locking
— Supports tag and data parity
Vectored interrupt support
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Signal processing engine 2 (SPE2) auxiliary processing unit (APU) operating on 64-bit general
purpose registers
PXS30 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
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