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PO74G2309ASU PDF预览

PO74G2309ASU

更新时间: 2024-11-15 06:04:35
品牌 Logo 应用领域
POTATO 驱动器时钟
页数 文件大小 规格书
6页 547K
描述
3.3V 1:9 CMOS Clock Buffered Driver

PO74G2309ASU 数据手册

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PO74G2309A  
3.3V 1:9 CMOS Clock Buffered Driver  
08/02/06  
700MHz TTL/CMOS Potato Chip  
FEATURES:  
DESCRIPTION:  
. Patented technology  
Potato Semiconductor’s PO74G2309A is  
designed for world top performance using  
submicron CMOS technology to achieve  
700MHz output frequency with less than 100ps  
output pin to pin skew.  
. Operating frequency up to 700MHz with 2pf load  
. Operating frequency up to 550MHz with 5pf load  
. Operating frequency up to 350MHz with 15pf load  
. Operating frequency up to 100MHz with 50pf load  
. Very low output pin to pin skew < 100ps  
. Very low pulse skew < 200ps  
PO74G2309A is a 1.65V to 3.6V CMOS  
1 input to 9 Output Buffered Driver to  
achieve 700MHz output frequency.  
. VCC = 1.65V to 3.6V  
Typical applications are clock and signal distribution.  
. Propagation delay < 1.9ns max with 15pf load  
. Low input capacitance: 3pf typical  
. 1:9 fanout  
. Available in 16pin 150mil wide SOIC package  
. Available in 16pin 173mil wide TSSOP package  
Inputs can be driven from either 3.3V or 5V devices.  
This feature allows the use of these devices as  
translators in a mixed 3.3V/5V system environment.  
Pin Configuration  
Logic Block Diagram  
BUF_IN  
OUTPUT1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
BUF_IN  
OUTPUT9  
OUTPUT2  
OUTPUT3  
OUTPUT1  
OUTPUT8  
OUTPUT7  
OUTPUT2  
OUTPUT4  
OUTPUT5  
V
V
DD  
DD  
GND  
GND  
OUTPUT3  
OUTPUT4  
OUTPUT6  
OUTPUT7  
OUTPUT8  
OUTPUT9  
OUTPUT6  
OUTPUT5  
GND  
V
DD  
Pin Description  
Pin Name  
Description  
BUF_IN  
Input  
Outputs  
OUTPUT 1 to OUTPUT 9  
1
Copyright © Potato Semiconductor Corporation  

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