Datasheet > PO49FCT32802T

PO49FCT32802T

更新时间： 2024-11-14 06:04:35

品牌	Logo	应用领域
POTATO		驱动器时钟
页数	文件大小	规格书
6页	514K
描述
3.3V 1:5 CMOS Clock Buffered Driver

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PO49FCT32802T 数据手册

PO49FCT32802G

3.3V 1:5 CMOS Clock Buffered Driver

11/22/05

1GHz TTL/CMOS Potato Chip

FEATURES:

DESCRIPTION:

. Patented technology

. Max input frequency > 1GHz

. Operating frequency up to 1GHz with 2pf load

. Operating frequency up to 700MHz with 5pf load

Potato Semiconductor’s PO49FCT32802G is

designed for world top performance using

submicron CMOS technology to achieve 1GHz

TTL output frequency with less than 100ps

. Operating frequency up to 250MHz with 15pf load output skew.

. Very low output pin to pin skew < 100ps

. Very low pulse skew < 150ps

PO49FCT32802G is a 3.3V CMOS 1 input to 5

. VCC = 1.65V to 3.6V

outputs Buffered driver with integrated series

damping resistors on all outputs to match 50 ohm

transmission line impedance. Typical applications

are clock and signal distribution.

. Propagation delay < 1.9 ns max with 15pf load

. Low input capacitance: 3pf typical

. 1:5 fanout

. Available in 16pin 150mil wide QSOP package

. Available in 16pin 173mil wide TSSOP package

Pin Configuration

Logic Block Diagram

Pin Description

Pin Name

Description

Input

INA

O1 to O5

Outputs

12 3 4 5 6

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