Datasheet > PO49FCT32803T

PO49FCT32803T

更新时间： 2024-11-14 06:04:35

品牌	Logo	应用领域
POTATO		驱动器时钟
页数	文件大小	规格书
6页	538K
描述
3.3V 1:7 CMOS Clock Buffered Driver

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中文翻译

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数据手册

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PO49FCT32803T 数据手册

PO49FCT32803

3.3V 1:7 CMOS Clock Buffered Driver

11/22/05

500MHz TTL/CMOS Potato Chip

FEATURES:

DESCRIPTION:

. Operating frequency up to 500MHz with 2pf load

. Operating frequency up to 400MHz with 5pf load

Potato Semiconductor’s PO49FCT32803G is

designed for world top performance using

. Operating frequency up to 230MHz with 15pf load submicron CMOS technology to achieve

. Operating frequency up to 85MHz with 50pf load

. Very low output pin to pin skew < 250ps

. Very low pulse skew < 200ps

500MHz output frequency with less than 250ps

output skew.

. VCC = 1.65V to 3.6V

PO49FCT32803G is a 3.3V CMOS 1 input to 7

Output Buffered Driver with integrated series

damping resistors on all outputs to match 50 ohm

transmission line impedance. Typical applications

are clock and signal distribution.

. Propagation delay < 2.3ns max with 15pf load

. Low input capacitance: 3pf typical

. 1:7 fanout

. Available in 16pin 150mil wide QSOP package

. Available in 16pin 173mil wide TSSOP package

Pin Configuration

Logic Block Diagram

Pin Description

Pin Name

INA

Description

Input

O1 to O7

Outputs

12 3 4 5 6

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