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PO49FCT32805 PDF预览

PO49FCT32805

更新时间: 2024-11-14 06:04:35
品牌 Logo 应用领域
POTATO 驱动器时钟
页数 文件大小 规格书
6页 553K
描述
3.3V Dual 1:5 CMOS Clock Buffered Driver

PO49FCT32805 数据手册

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PO49FCT32805  
3.3V Dual 1:5 CMOS Clock Buffered Driver  
11/22/05  
600MHz TTL/CMOS Potato Chip  
FEATURES:  
DESCRIPTION:  
. Operating frequency up to 600MHz with 2pf load  
. Operating frequency up to 500MHz with 5pf load  
Potato Semiconductor’s PO49FCT32805G is  
designed for world top performance using  
. Operating frequency up to 270MHz with 15pf load submicron CMOS technology to achieve  
. Operating frequency up to 120MHz with 50pf load 600MHz TTL output frequency with less than  
. Very low output pin to pin skew < 250ps  
. Very low pulse skew < 200ps  
200ps output pulse skew.  
. VCC = 1.65V to 3.6V  
PO49FCT32805G is a 3.3V CMOS Dual 1 input  
to 5 outputs Buffered driver to achieve 600MHz  
output frequency with integrated series damping  
resistors on all outputs to match 50 ohm  
transmission line impedance. Typical applications  
are clock and signal distribution.  
. Propagation delay < 2.6ns max with 15pf load  
. Low input capacitance: 3pf typical  
. Dual 1:5 fanout  
. Available in 20pin 300mil wide SOIC package  
. Available in 20pin 150mil wide QSOP package  
Pin Configuration  
Logic Block Diagram  
Pin Description  
Pin Name  
Description  
Inputs  
INA, INB  
Outputs  
OAn, OBn  
INA, INB  
Signal or clock Inputs  
MON  
L
Hi-Z State Output Enable Inputs (Active LOW)  
L
L
L
OAn, OBn  
MON  
Signal or clock Outputs  
Monitor Output  
L
H
H
H
L
H
Z
Z
H
L
Vcc, GND  
Power, Ground  
H
H
1
Copyright © 2005, Potato Semiconductor Corporation  

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