Datasheet > PL663-19

PL663-19

更新时间： 2024-11-09 06:04:03

品牌	Logo	应用领域
PLL		倍频器
页数	文件大小	规格书
15页	484K
描述
Analog Frequency Multiplier

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数据手册

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PL663-19 数据手册

Analog Frequency Multiplier

PL660 and PL663 XO Families

DESCRIPTION

PhaseLink’s Analog Frequency Multipliers ^TM

FEATURES

• Non-PLL frequency multiplication

(AFMs) are the industry’s first “Balanced Oscillator”

utilizing analog multiplication of the fundamental

frequency (at double or quadruple frequency),

combined with an attenuation of the fundamental of

the reference crystal, without using a phase-locked

loop (PLL), in CMOS technology.

• Input frequency from 30-200 MHz

• Output frequency from 60-800 MHz

• Low phase noise and jitter (equivalent to fundamental

at the output frequency)

• Ultra-low jitter

o RMS phase jitter < 0.25 ps (12 kHz to 20 MHz)

o RMS period jitter < 2.5 ps typ.

• Low phase noise

o -145 dBc/Hz @ 100 kHz offset from 155.52 MHz

o -150 dBc/Hz @ 10 MHz offset from 155.52 MHz

• Low input frequency eliminates the need for expensive

crystals

PhaseLink’s patent pending PL66x family of AFM

products can achieve up to 800 MHz differential

PECL, LVDS, or single-ended CMOS output with

little jitter or phase noise deterioration.

PL66x-xx family of products utilize a low-power

CMOS technology and are housed in GREEN/

RoHS compliant 16-pin TSSOP and 3x3 QFN

packages.

• Differential PECL/LVDS, or single-ended CMOS output

• Single 2.5V or 3.3V +/- 10% power supply

• Optional industrial temperature range (-40°C to +85°C)

• Available in 16-pin GREEN/RoHS compliant TSSOP, and

16-pin 3x3 QFN packages.

Figure 1: 2X AFM Phase Noise at 212.5 MHz (106.25 MHz 3^rdovertone crystal)

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990, FAX (510) 492-0991

www.phaselink.com

Rev. 3/20/07 Page 1

12 3 4 5 6 7...15

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