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PL663-19 PDF预览

PL663-19

更新时间: 2024-02-05 04:08:54
品牌 Logo 应用领域
PLL 倍频器
页数 文件大小 规格书
15页 484K
描述
Analog Frequency Multiplier

PL663-19 技术参数

生命周期:ActiveReach Compliance Code:compliant
风险等级:5.37安装特点:SURFACE MOUNT
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装等效代码:LCC16,.12SQ,20电源:2.5/3.3 V
子类别:RF/Microwave Frequency Multipliers最大压摆率:75 mA
表面贴装:YES技术:CMOS

PL663-19 数据手册

 浏览型号PL663-19的Datasheet PDF文件第2页浏览型号PL663-19的Datasheet PDF文件第3页浏览型号PL663-19的Datasheet PDF文件第4页浏览型号PL663-19的Datasheet PDF文件第6页浏览型号PL663-19的Datasheet PDF文件第7页浏览型号PL663-19的Datasheet PDF文件第8页 
Analog Frequency Multiplier  
PL660 and PL663 XO Families  
EXTERNAL COMPONENT VALUES  
INDUCTOR VALUE OPTIMIZATION  
The required inductor value(s) for the best performance depends on the operating frequency, and the board layout  
specifications. The listed values in this datasheet are based on the calculated parasitic values from PhaseLink’s  
evaluation board design. These inductor values provide the user with a starting point to determine the optimum  
inductor values. Additional fine-tuning may be required to determine the optimal solution.  
To assist with the inductor value optimization, PhaseLink has developed the “AFM Tuning Assistant” software. You  
can download this software from PhaseLink’s web site (www.phaselink.com). The software consists of two  
worksheets. The first worksheet (named L2) is used to fine-tune the ‘L2’ inductor value, and the second worksheet  
(named L4) is used for fine tuning of the ‘L4’ (used in 4x AFMs only) inductor value.  
For those designs using PhaseLink’s recommended board layout, you can use the “AFM Tuning Assistant” to  
determine the optimum values for the required inductors. This software is developed based on the parasitic  
information from PhaseLink’s board layout and can be used to determine the required inductor and parallel  
capacitor (see LWB1 and Cstray parameters) values. For those employing a different board layout in their design,  
we recommend to use the parasitic information of their board layout to calculate the optimized inductor values.  
Please use the following fine tuning procedure:  
Figure 5: Diagram Representation of the Related System Inductance and Capacitance  
DIE SIDE  
- Cinternal = Based on AFM Device  
PCB side  
- LWB1 = 2 nH, (2 places), Stray inductance  
- Cpad = 2.0 pF, Bond pad and its ESD circuitry - Cstray = 1.0 pF, Stray capacitance  
- L2X (L4X) = 2x or 4x inductor  
- C11 = 0.4 pF, The following amplifier stage  
- C2X (C4X) = range (0.1 to 2.7), Fine tune inductor if  
used  
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990, FAX (510) 492-0991  
www.phaselink.com  
Rev. 3/20/07 Page 5  

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