Datasheet > PI74SSTVF32852ANBE

PI74SSTVF32852ANBE

更新时间： 2024-09-13 15:47:55

品牌	Logo	应用领域
百利通 - PERICOM		逻辑集成电路电视
页数	文件大小	规格书
8页	543K
描述
D Flip-Flop, SSTV Series, 1-Func, 24-Bit, True Output, CMOS, PBGA114, LEAD FREE, LFBGA-114

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PI74SSTVF32852ANBE 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	LFBGA, BGA114,6X19,32
针数：	114	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.27	系列：	SSTV
JESD-30 代码：	R-PBGA-B114	长度：	16 mm
逻辑集成电路类型：	D FLIP-FLOP	位数：	24
功能数量：	1	端子数量：	114
最高工作温度：	70 °C	最低工作温度：
输出极性：	TRUE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFBGA	封装等效代码：	BGA114,6X19,32
封装形状：	RECTANGULAR	封装形式：	GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	2.5 V
传播延迟（tpd）：	2.1 ns	认证状态：	Not Qualified
座面最大高度：	1.45 mm	子类别：	Other Logic ICs
最大供电电压 (Vsup)：	2.7 V	最小供电电压 (Vsup)：	2.3 V
标称供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子形式：	BALL	端子节距：	0.8 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	5.5 mm	最小 fmax：	210 MHz
Base Number Matches：	1

PI74SSTVF32852ANBE 数据手册

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PI74SSTVF32852A

24-Bit to 48-Bit Registered Buffer

ProductFeatures

ProductDescription

• PI74SSTVF32852Aisdesignedforlow-voltageoperation,

2.5VforPC1600~PC2700;2.6VforPC3200

• Supports SSTL_2 Class I specifications on outputs

• AllInputsareSSTL_2Compatible,exceptRESET

whichisLVCMOS.

Pericom Semiconductor’s PI74SSTVF32852A logic circuit is

produced using the Company’s advanced sub-micron CMOS

technology, achieving industry leading speed.

All inputs are compatible with the JEDEC standard for SSTL_2,

excepttheLVCMOSreset(RESET)input.AlloutputsareSSTL_2,

ClassIIcompatible.

• Designed for DDR Memory

• Packaging:114-BallLFBGA

The device operates from a differential clock (CK and CK). Data

registered at the crossing of CK going HIGH, and CK going LOW.

•Pb-freeavailable

The PI74SSTVF32852A supports low-power standby operation.

WhenRESETisLOW, thedifferentialinputreceiversaredisabled,

and undriven (floating) data, clock and reference voltage (VREF)

inputs are allowed. In addition, when RESET is LOW, all registers

are reset, and all outputs are forced LOW. The LVCMOS RESET

input must always be held at a valid logic HIGH or LOW level.

LogicBlockDiagram

CLK

Q1A

Q1B

RESET

CLK

To ensure defined outputs from the register before a stable clock

has been supplied, RESET must be held in the LOW state during

power up.

REF

IntheDDRDIMMapplication,RESETisspecifiedtobecompletely

asynchronous with respect to CK and CK. Therefore, no timing

relationship can be guaranteed between the two. When entering

RESET, the register will be cleared and the outputs will be driven

LOW quickly, relative to the time to disable the differential input

receivers, thus ensuring no glitches on the output. However, when

comingoutof RESET,theregisterwillbecomeactivequickly,relative

to the time to enable the differential input receivers. When the data

inputs are LOW, and the clock is stable, during the time from the

LOW-to-HIGH transition of RESET until the input receivers

are fully enabled, the design must ensure that the outputs will

remainLOW.

TO 23 OTHER CHANNELS

ProductPinDescription

Pin Name

Description

Reset (Active Low) LVCMOS

RESET

CLK

Clock Input, Positive Differential Input

Clock Input, Negative Differential Input

Data Input

Data Output

GND

V_DD

V_DDQ

V_REF

Ground

Pericom’s PI74SSTVF32852A is characterized for operation from

0°to70°C.

Core Supply Voltage, 2.5V Nominal

Output Supply Voltage, 2.5V Nominal

Input Reference Voltage, 1.25V Nominal

TruthTable⁽¹⁾

Inputs

Outputs

RESET

CLK

X or Floating

↑

↓

L or H

Qo⁽²⁾

Notes:

1. H= High Signal Level; L = Low Signal Level; ↑ = Transition LOW-to-HIGH; ↓ = Transition HIGH-to-LOW

X = Irrelevant or floating

2. Output level before the indicated steady state input conditions were established.

08-0291

PS8682A

11/10/08

12 3 4 5 6 7 8

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与PI74SSTVF32852ANBE相关器件

型号	品牌	获取价格	描述	数据表
PI74SSTVF32852NB	PERICOM	获取价格	D Flip-Flop, SSTV Series, 1-Func, Positive Edge Triggered, 24-Bit, True Output, CMOS, PBGA
PI74SSTVF32852NBEX	PERICOM	获取价格	Bus Driver, CMOS, PBGA114
PI74SSTVF32852NBX	PERICOM	获取价格	Bus Driver, CMOS, PBGA114
PI74ST1G00	PERICOM	获取价格	SOTiny Logic 2-Input NAND Gate
PI74ST1G00CX	PERICOM	获取价格	SOTiny Logic 2-Input NAND Gate
PI74ST1G00TX	PERICOM	获取价格	SOTiny Logic 2-Input NAND Gate
PI74ST1G02	PERICOM	获取价格	SOTiny™ Logic 2-Input NOR Gate
PI74ST1G02CX	PERICOM	获取价格	SOTiny™ Logic 2-Input NOR Gate
PI74ST1G02TX	PERICOM	获取价格	SOTiny™ Logic 2-Input NOR Gate
PI74ST1G04	PERICOM	获取价格	SOTiny Logic Inverter

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