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PI74FCT162501TA

更新时间： 2024-10-28 15:47:55
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 76K
描述
Registered Bus Transceiver, FCT Series, 18-Func, 1-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TSSOP-56

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中文翻译

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PI74FCT162501TA 技术参数

是否Rohs认证：不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP56,.3,20
针数：56Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.32Is Samacsys：N
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：FCTJESD-30 代码：R-PDSO-G56
JESD-609代码：e0长度：14 mm
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.024 A
位数：1功能数量：18
端口数量：2端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP56,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TUBE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：6.1 mmBase Number Matches：1

PI74FCT162501TA 数据手册

 浏览型号PI74FCT162501TA的Datasheet PDF文件第2页浏览型号PI74FCT162501TA的Datasheet PDF文件第3页浏览型号PI74FCT162501TA的Datasheet PDF文件第4页浏览型号PI74FCT162501TA的Datasheet PDF文件第5页浏览型号PI74FCT162501TA的Datasheet PDF文件第6页浏览型号PI74FCT162501TA的Datasheet PDF文件第7页 
PI74FCT16501T
PI74FCT162501T
PI74FCT162H501T  
Fast CMOS 18-Bit  
Registered Transceivers  
ProductFeatures  
CommonFeatures:  
Product Description  
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-  
duced in the Company’s advanced 0.6 micron CMOS technology,  
achieving industry leading speed grades.  
• PI74FCT16501T,PI74FCT162501T,andPI74FCT162H501T  
are high-speed,  
low power devices with high current drive.  
ThePI74FCT16501T,PI74FCT162501T,andPI74FCT162H501T  
are 18-bit are registered bus transceivers designed with D-type  
latches and flip-flops to allow data flow in transparent, latched, and  
clocked modes. The Output Enable (OEAB and OEBA, Latch  
Enable (LEAB and LEBA) and Clock (CLKAB and CLKBA)  
inputs control the data flow in each direction. When LEAB is  
HIGH, the device operates in transparent mode for A-to-B data  
flow. When LEAB is LOW, the A data is latched if CLKAB is held  
at a HIGH or LOW logic level. The A bus data is stored in the latch/  
flip-flopontheLOW-to-HIGHtransitionofCLKAB,ifLEABisLOW.  
OEABperformstheoutputenablefunctionontheBport. Dataflow  
from B port to A port is similar using OEBA, LEBA and CLKBA.  
These high-speed, low power devices offer a flow-through  
organization for ease of board layout.  
• VCC =5V±10%  
• Hysteresis on all inputs  
• Packages available  
–56-pin240milwideplasticTSSOP(A)  
–56-pin300milwideplasticSSOP(V)  
PI74FCT16501TFeatures  
• High output drive: IOH = –32 mA; IOL = 64 mA  
• Power off disable outputs permit “live insertion”  
• Typical VOLP (Output Ground Bounce) < 1.0V  
atVCC =5V,TA =25°C  
PI74FCT162501TFeatures  
ThePI74FCT16501ToutputbuffersaredesignedwithaPower-Off  
disable allowing "live insertion" of boards when used as backplane  
drivers.  
• Balanced output drivers: ±24 mA  
• Reduced system switching noise  
• Typical VOLP (Output Ground Bounce) < 0.6V  
atVCC =5V,TA =25°C  
The PI74FCT162501T has ±24 mA balanced output drivers. It is  
designed with current limiting resistors at its outputs to control the  
output edge rate resulting in lower ground bounce and undershoot.  
This eliminates the need for external terminating resistors for most  
interface applications.  
PI74FCT162H501TFeatures  
• Bus Hold retains last active bus state during 3-state  
• Eliminates the need for external pull-up resistors  
The PI74FCT162H501T has “Bus Hold” which retains the input’s  
last state whenever the input goes to high-impedance preventing  
“floating”inputsandeliminatingtheneedforpull-up/downresistors.  
Logic Block Diagram  
OEAB  
CLKBA  
LEBA  
OEBA  
CLKAB  
LEAB  
C
C
B
1
A
1
D
D
C
D
C
D
TO 17 OTHER CHANNELS  
PS2035A 03/11/96  
1
12345678

中文翻译

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