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PI74AVCH16501K PDF预览

PI74AVCH16501K

更新时间： 2024-11-06 15:47:55
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路触发器电视
页数 文件大小 规格书
5页 374K
描述
Registered Bus Transceiver, AVC Series, 1-Func, 18-Bit, True Output, CMOS, PDSO48, 0.173 INCH, PLASTIC, TVSOP-48

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PI74AVCH16501K 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：TSSOP, TSSOP56,.25,16
针数：48Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.92控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：AVC
JESD-30 代码：R-PDSO-G48JESD-609代码：e0
长度：9.7 mm负载电容（CL）：50 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.024 A
位数：18功能数量：1
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP56,.25,16封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 VProp。Delay @ Nom-Sup：3.9 ns
传播延迟（tpd）：6.7 ns认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.4 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
触发器类型：POSITIVE EDGE宽度：4.4 mm
Base Number Matches：1

PI74AVCH16501K 数据手册

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ADVANCE INFORMATION  
PI74AVC16501  
PI74AVCH16501  
18-Bit Universal Bus Transceiver  
with 3-State Outputs  
Product Features  
ProductDescription  
Pericom Semiconductor’s PI74AVC series of logic circuits are  
produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
• Designed for low voltage operation,  
V
CC  
from 1.65V to 3.6V  
• Sub 2.0ns delays at 2.5V and 3.3V  
The18-bituniveralbustransceiverisdesignedforbidirectionaldata  
flow.DirectioniscontrolledbyOutputEnable(OEABandOEBA),  
Latched Enable (LEAB and LEBA), and CLOCK (CLKAB and  
CLKBA) inputs. For A-to-B data flow, the device operates in the  
transparent mode when LEAB is HIGH. When LEAB is LOW, the  
A data is latched if CLKAB is held at a high or low logic level. If  
LEABisLOW,theA-busisstoredinthelatch/flip-floponthehigh-  
to-lowtransitionofCLKAB.WhenOEABisHIGH,theoutputsare  
active.WhenOEABisLOW,theoutputsareinthehigh-impedance  
state.  
• Dynamic Impedance Control on outputs,  
current drive > ±24mA at 2.5V V  
CC  
• Patented noise reduction circuit  
• I/O Tolerant to 3.6V, Inputs and Outputs  
for mixed voltage systems  
• Supports live insertion  
• Industrial operation at –40°C to +85°C  
• Available Packages:  
– 48-pin 240 mil wide plastic TSSOP (A48)  
– 48-pin 173 mil wide plastic TVSOP (K48)  
DataflowforBtoAissimilartothatofAtoBbutusesOEBA,LEBA,  
and CLKBA. The Output Enables are complementary (OEAB is  
activeHIGHandOEBAisactiveLOW).  
To ensure the high-impedance state during power up or power  
down, OEBA should be tied to V through a pull-up resistor and  
CC  
Logic Block Diagram  
OEAB should be tied to GND through a pulldown resistor; the  
minimumvalue of the resistor is determined by the current-sinking  
capability of the driver.  
The PI74AVCH16501 has “Bus Hold” which retains the data  
Pinput’s last state whenever the data input goes to high-  
impedance preventing “floating” inputs and eliminating the need  
for pullup/down resistors.  
PSXXXX 2/02/99  
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