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PI74AVCH16646KX PDF预览

PI74AVCH16646KX

更新时间: 2024-11-21 19:34:59
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路电视
页数 文件大小 规格书
6页 432K
描述
Registered Bus Transceiver, AVC Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.173 INCH, PLASTIC, TVSOP-48

PI74AVCH16646KX 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP,针数:48
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.73
系列:AVCJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:9.7 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):5.6 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

PI74AVCH16646KX 数据手册

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ADVANCE INFORMATION  
PI74AVC16646  
PI74AVCH16646  
16-Bit Bus Transceiver and Register  
with 3-State Outputs  
ProductDescription  
Product Features  
Pericom Semiconductor’s PI74AVC series of logic circuits are  
produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
· Designed for low voltage operation,  
VCC = 1.65V to 3.6V  
· Sub 2.0ns delays at 2.5V and 3.3V  
· Dynamic Impedance Control on outputs,  
current drive > ±24mA at 2.5VCC  
This 16-bit bus transceiver and register can be used as two  
8-bit transceivers or one 16-bit transceiver. Data on the A or B bus  
is clocked into the registers on the low-to-high transition of the  
appropriate Clock (CLKAB or CLKBA) input. Four fundamental  
bus-management functions can be performed.  
· Patented noise reduction circuit  
· I/O Tolerant to 3.6V, Inputs and Outputs for  
mixed voltage systems  
OutputEnable(OE)andDirectionControl(DIR)inputsareprovided  
to control the transceiver functions. In the transceiver mode, data  
present at the high-impedance port may be stored in either register  
orinboth. TheSelectControl(SABandSBA)inputscanmultiplex  
stored and real-time (transparent mode) data. Circuitry used for  
Select Control eliminates the typical decoding glitch that occurs in  
a multiplexer during the transition between stored and real-time  
data. DIRdetermineswhichbusreceivesdatawhenOEisLOW. In  
theisolationmode(OEHIGH), Adatamaybestoredinoneregister  
and/or B data may be stored in the other register.  
· Supports live insertion  
· Industrial operation at -40°C to +85°C  
· Available Packages:  
– 48-pin 240 mil wide plastic TSSOP (A48)  
– 48-pin 173 mil wide plastic TVSOP (K48)  
When an output function is disabled, the input function is still  
enabled and may be used to store and transmit data. Only one of the  
two buses, A or B, can be driven at a time.  
To ensure the high-impedance state during power up or power  
down, OE should be tied to V through a pullup resistor; the  
CC  
minimumvalue of the resistor is determined by the current-sinking  
capability of the driver.  
The PI74AVCH16646 has “Bus Hold” which retains the data input’s  
last state whenever the data input goes to high-impedance  
preventing “floating” inputs and eliminating the need for pullup/  
down resistors.  
Logic Block Diagram  
PS8102A 10/07/98  
1

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