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PI74AVCH16501KX PDF预览

PI74AVCH16501KX

更新时间: 2024-11-25 15:47:55
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路电视
页数 文件大小 规格书
5页 374K
描述
Registered Bus Transceiver, AVC Series, 1-Func, 18-Bit, True Output, CMOS, PDSO48, 0.173 INCH, PLASTIC, TVSOP-48

PI74AVCH16501KX 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP,针数:48
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
系列:AVCJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:9.7 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:18
功能数量:1端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):6.7 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

PI74AVCH16501KX 数据手册

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ADVANCE INFORMATION  
PI74AVC16501  
PI74AVCH16501  
18-Bit Universal Bus Transceiver  
with 3-State Outputs  
Product Features  
ProductDescription  
Pericom Semiconductor’s PI74AVC series of logic circuits are  
produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
Designed for low voltage operation,  
V
CC  
from 1.65V to 3.6V  
Sub 2.0ns delays at 2.5V and 3.3V  
The18-bituniveralbustransceiverisdesignedforbidirectionaldata  
flow.DirectioniscontrolledbyOutputEnable(OEABandOEBA),  
Latched Enable (LEAB and LEBA), and CLOCK (CLKAB and  
CLKBA) inputs. For A-to-B data flow, the device operates in the  
transparent mode when LEAB is HIGH. When LEAB is LOW, the  
A data is latched if CLKAB is held at a high or low logic level. If  
LEABisLOW,theA-busisstoredinthelatch/flip-floponthehigh-  
to-lowtransitionofCLKAB.WhenOEABisHIGH,theoutputsare  
active.WhenOEABisLOW,theoutputsareinthehigh-impedance  
state.  
Dynamic Impedance Control on outputs,  
current drive > ±24mA at 2.5V V  
CC  
Patented noise reduction circuit  
I/O Tolerant to 3.6V, Inputs and Outputs  
for mixed voltage systems  
Supports live insertion  
Industrial operation at –40°C to +85°C  
Available Packages:  
– 48-pin 240 mil wide plastic TSSOP (A48)  
– 48-pin 173 mil wide plastic TVSOP (K48)  
DataflowforBtoAissimilartothatofAtoBbutusesOEBA,LEBA,  
and CLKBA. The Output Enables are complementary (OEAB is  
activeHIGHandOEBAisactiveLOW).  
To ensure the high-impedance state during power up or power  
down, OEBA should be tied to V through a pull-up resistor and  
CC  
Logic Block Diagram  
OEAB should be tied to GND through a pulldown resistor; the  
minimumvalue of the resistor is determined by the current-sinking  
capability of the driver.  
The PI74AVCH16501 has “Bus Hold” which retains the data  
Pinput’s last state whenever the data input goes to high-  
impedance preventing “floating” inputs and eliminating the need  
for pullup/down resistors.  
PSXXXX 2/02/99  
1

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