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PF48F5000M0YBC0 PDF预览

PF48F5000M0YBC0

更新时间: 2024-02-14 15:28:10
品牌 Logo 应用领域
恒忆 - NUMONYX 内存集成电路闪存
页数 文件大小 规格书
141页 2256K
描述
Flash, 32MX16, 96ns, PBGA107,

PF48F5000M0YBC0 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:FBGA, BGA107,9X12,32Reach Compliance Code:unknown
风险等级:5.8最长访问时间:96 ns
启动块:BOTTOM命令用户界面:NO
通用闪存接口:YES数据轮询:NO
JESD-30 代码:R-PBGA-B107内存密度:536870912 bit
内存集成电路类型:FLASH内存宽度:16
部门数/规模:256端子数量:107
字数:33554432 words字数代码:32000000
最高工作温度:85 °C最低工作温度:-30 °C
组织:32MX16封装主体材料:PLASTIC/EPOXY
封装代码:FBGA封装等效代码:BGA107,9X12,32
封装形状:RECTANGULAR封装形式:GRID ARRAY, FINE PITCH
页面大小:16 words并行/串行:PARALLEL
电源:1.8 V认证状态:Not Qualified
部门规模:128K最大待机电流:0.00003 A
子类别:Flash Memories最大压摆率:0.05 mA
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM切换位:NO
类型:NOR TYPEBase Number Matches:1

PF48F5000M0YBC0 数据手册

 浏览型号PF48F5000M0YBC0的Datasheet PDF文件第1页浏览型号PF48F5000M0YBC0的Datasheet PDF文件第2页浏览型号PF48F5000M0YBC0的Datasheet PDF文件第3页浏览型号PF48F5000M0YBC0的Datasheet PDF文件第5页浏览型号PF48F5000M0YBC0的Datasheet PDF文件第6页浏览型号PF48F5000M0YBC0的Datasheet PDF文件第7页 
M18 Discrete  
7.5  
7.6  
Reset Specifications ...........................................................................................69  
Deep Power Down Specifications..........................................................................69  
8.0 NOR Flash Bus Interface ..........................................................................................71  
8.1  
Bus Reads ........................................................................................................71  
8.1.1 Asynchronous single-word reads...............................................................72  
8.1.2 Asynchronous Page Mode (Non-multiplexed devices only) ............................72  
8.1.3 Synchronous Burst Mode .........................................................................72  
Bus Writes........................................................................................................73  
Reset ...............................................................................................................73  
Deep Power-Down .............................................................................................73  
Standby ...........................................................................................................74  
Output Disable ..................................................................................................74  
Bus Cycle Interleaving........................................................................................74  
8.7.1 Read Operation During Program Buffer fill..................................................75  
Read-to-Write and Write-to-Read Bus Transitions...................................................75  
8.8.1 Write to Asynchronous read transition .......................................................75  
8.8.2 Write to synchronous read transition .........................................................75  
8.8.3 Asynchronous/Synchronous read to write transition.....................................75  
8.8.4 Bus write with active clock.......................................................................75  
8.2  
8.3  
8.4  
8.5  
8.6  
8.7  
8.8  
9.0 NOR Flash Operations ..............................................................................................76  
9.1  
9.2  
9.3  
Status Register..................................................................................................76  
9.1.1 Clearing the Status Register.....................................................................77  
Read Configuration Register................................................................................77  
9.2.1 Latency Count........................................................................................78  
Enhanced Configuration Register..........................................................................79  
9.3.1 Output Driver Control..............................................................................80  
9.3.2 Programming the ECR .............................................................................80  
Read Operations................................................................................................81  
9.4.1 Read Array ............................................................................................81  
9.4.2 Read Status Register...............................................................................82  
9.4.3 Read Device Information .........................................................................82  
9.4.4 CFI Query..............................................................................................83  
Programming Modes ..........................................................................................83  
9.5.1 Control Mode .........................................................................................84  
9.5.2 Object Mode ..........................................................................................85  
Programming Operations ....................................................................................88  
9.6.1 Single-Word Programming .......................................................................88  
9.6.2 Buffered Programming ............................................................................89  
9.6.3 Buffered Enhanced Factory Programming (BEFP).........................................90  
Block Erase Operations.......................................................................................92  
Blank Check Operation .......................................................................................93  
Suspend and Resume.........................................................................................93  
9.4  
9.5  
9.6  
9.7  
9.8  
9.9  
9.10 Simultaneous Operations....................................................................................95  
9.11 Security ...........................................................................................................95  
9.11.1 Block Locking.........................................................................................95  
9.11.2 One-Time Programmable (OTP) Registers ..................................................97  
9.11.3 Global Main-Array Protection....................................................................99  
10.0 Device Command Codes .........................................................................................100  
11.0 Flow Charts............................................................................................................101  
12.0 Common Flash Interface........................................................................................110  
12.1 Query Structure Output ....................................................................................110  
12.2 Block Status Register .......................................................................................111  
Datasheet  
4
November 2007  
Order Number: 309823-10  

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