Intel StrataFlash® Cellular Memory (M18)
Table 29.
38F / 48F Density Decoder
Code
Flash Density
RAM Density
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
No Die
No Die
32-Mbit
64-Mbit
128-Mbit
256-Mbit
512-Mbit
1-Gbit
4-Mbit
8-Mbit
16-Mbit
32-Mbit
64-Mbit
128-Mbit
256-Mbit
512-Mbit
1-Gbit
2-Gbit
4-Gbit
8-Gbit
16-Gbit
32-Gbit
64-Gbit
128-Gbit
256-Gbit
512-Gbit
2-Gbit
4-Gbit
8-Gbit
16-Gbit
32-Gbit
64-Gbit
Table 30.
NOR Flash Family Decoder
Code
Family
Marketing Name
C
C3
Intel Advanced+ Boot Block Flash Memory
Intel Embedded Flash Memory
Intel StrataFlash® Wireless Memory
Intel StrataFlash® Cellular Memory
Intel StrataFalsh® Embedded Memory
Intel Wireless Flash Memory
J3v.D
J
L
L18 / L30
M18
M
P
P30 / P33
W18 / W30
-
W
0(zero)
No Die
Table 31.
Voltage / NOR Flash CE# Configuration Decoder
I/O
Voltage
(Volt)
Code
Core Voltage (Volt)
CE# Configuration
Z
3.0
1.8
Seperate Chip Enable per die
Seperate Chip Enable per die
Seperate Chip Enable per die
Virtual Chip Enable
1.8
3.0
3.0
1.8
3.0
1.8
3.0
1.8
1.8
1.8
Y
X
V
U
T
Virtual Chip Enable
Virtual Chip Enable
Intel StrataFlash® Cellular Memory (M18)
July 2007
Document Number: 309823-009US
DS
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