Datasheet > PF48F5000M0Y3C0

PF48F5000M0Y3C0

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
英特尔 - INTEL		/
页数	文件大小	规格书
68页	1704K
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Memory IC

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PF48F5000M0Y3C0 数据手册

Intel StrataFlash^®Cellular Memory (M18)

7.4

Program and Erase Characteristics

The M18 device includes specifications for different lithographies, densities, and

frequencies. For additional information on combinations, see Table 4, “M18 Product

Litho/Density/Frequency Combinations” on page 8 in the Section 2.0, “Functional

Description.

Table 24.

Program-Erase Characteristics

_PPL/V_PPH

Nbr.

Symbol

Parameter

Unit Notes

Density

(Mbit)

Litho (nm)

Min

Typ

Max

Conventional Word Programming

Single word (first

—

115

230

word)

Program

Time

W200

t_PROG/W

µs

1,2

Single word

(subsequent word)

Buffered Programming

W200

t_PROG/W

Single word

—

250

500

4.3

µs

256, 512

2.15

Program

Time

One Buffer (512

words)

W250

t_PROG/PB

128, 256, 512

1,024

1.02

1.64

2.05

3.3

Buffered Enhanced Factory Programming

256, 512

4.2

2.0

W451

t_BEFP/W

Single word

128, 256, 512

—

1,3,4

Program

Time

µs

—

1,024

—

3.2

—

t_BEFP/

Setup

W452

Buffered EFP Setup

Erasing and Suspending

Erase

Time

128-Kword Main

Array Block

W501

t_ERS/MAB

—

0.9

W600

W601

t_SUSP/P

t_SUSP/E

Program suspend

Erase suspend

—

Suspend

Latency

µs

Blank Check

Blank

Check

W702

t_BC/MB

Main array block

—

3.2

—

Notes:

Typical values measured at T_C= +25 °C and nominal voltages. Performance numbers are valid for all speed versions.

Sampled, but not 100% tested.

First and subsequent words refer to first word and subsequent words in Control Mode programming region.

Averaged over entire device.

BEFP not validated at V_PPL

Intel StrataFlash^®Cellular Memory (M18)

July 2007

Document Number: 309823-009US

1...60 61 626364 65 66...68

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