Dual P-Channel Enhancement
Mode Field Effect Transistor
PE5B5DX
NIKO-SEM
PDFN 3x3P
Halogen-Free & Lead-Free
PRODUCT SUMMARY
V(BR)DSS
-20V
RDS(ON)
ID
20mΩ
-30A
Features
• Pb−Free, Halogen Free and RoHS compliant.
• Low RDS(on) to Minimize Conduction Losses.
• Ohmic Region Good RDS(on) Ratio.
• Optimized Gate Charge to Minimize Switching Losses.
Applications
• Protection Circuits Applications.
• Logic/Load Switch Circuits Applications.
G : GATE
D : DRAIN
S : SOURCE
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
Drain-Source Voltage
SYMBOL
VDS
LIMITS
-20
UNITS
V
V
Gate-Source Voltage
VGS
±12
-30
TC = 25 °C
TC = 100 °C
TA = 25 °C
TA = 70 °C
-19
Continuous Drain Current4
ID
-8.8
-7
A
Pulsed Drain Current1
Avalanche Current
Avalanche Energy
IDM
IAS
-40
-21.5
23
L = 0.1mH
TC = 25 °C
TC = 100 °C
TA = 25 °C
TA = 70 °C
EAS
mJ
W
29
11
Power Dissipation3
PD
2.5
1.6
Operating Junction & Storage Temperature Range
Tj, Tstg
-55 to 150
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
MAXIMUM
UNITS
Junction-to-Ambient2
50
72
t ≦10s
RJA
RJA
RJC
Junction-to-Ambient2
Steady-State
°C/W
Junction-to-Case
4.3
Steady-State
1Pulse width limited by maximum junction temperature.
2The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Coppe.
3The Power dissipation is based on RJA t ≦10s value.
4Package limitation current is -9A.
H-40-4
REV1.0
1