5
4
3
2
1
J1
D
C
B
A
D
C
B
A
17
18
19
20
21
22
23
24
8
7
6
5
4
3
2
1
GND
GND
RF2
RF1
RF3
RF2
RF4
J2
J4
RF1
GND
GND
GND
GND
RF3
GND
GND
GND
GND
RF4
PE42540
U1
J3
J5
GND
GND
R1
1M
R2
1M
J8
HEADER 14
R3
0 OHM
0 OHM
2
4
1
2
1
3
R4
R6
0 OHM
3
4
6
5
6
5
J6
J7
8
7
8
7
R5
10
12
14
9
10
12
14
9
Through Line
0 OHM
11
13
11
13
C1
22pF
C2
22pF
C3
22pF
C4
22pF
C5
C6
0.1uF
0.1uF
NOTES:
High frequency performance is dependent on proper RF connector assembly. The following factors must be controlled for
optimum performance:
1. The connector should fit tightly against the circuit board edge, avoid gaps.
2. The center contact pin must lie parallel and flat against the circuit board, avoid gaps.
3. The contact pin should be centered on the circuit board signal trace.
4. Use a minimal amount of solder between the contact pin and signal trace. Do not allow excess solder to build up or
flow down the trace.
5. Clean all excess flux and other residue from launch area, especially between the trace and ground.
CONTRACT NO.
UNLESS OTHERWISE SPECIFIED
DIMENSIONS AND TOLERANCES
6. USE 101-0515-01 PCB.
ARE IN INCHES AND
PEREGRINE SEMICONDUCTOR
APPLY TO THE FINISHED PART
7. CAUTION:
9380 Carroll Park Drive, Suite 100
San Diego, CA 92121
TOLERANCES ARE:
DRAWN
DATE
CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE
TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD)
FRACTIONS DECIMALS
JEFF LUNDY
6-28-10
DATE
±
.XX ± .01
.XXX ± .005
DO NOT SCALE DRAWING
ENGINEER
6-28-10
MATT ALLISON
8. ALL TRANSMISSION LINES ARE:
MATERIAL
SCHEMATIC, PE42540 EVK PCB
CHECKED
DATE
DATE
DATE
15 MIL WIDTH, 10MIL GAPS, 8 MIL CORE DIELECTRIC
SIZE
CAGE CODE
DWG NO.
REV
ROGERS 4003 ON TOP LAYER AND FR4 ON INNER AND BOTTOM LAYERS.
FINISH
APPROVED
ISSUED
102-0612
02
SIMILAR TO
MARKING SYMBOL
SCALE:
DATE
Sheet
1 of 1
5
4
3
2
1