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PCX7457VGHY600NC PDF预览

PCX7457VGHY600NC

更新时间: 2024-11-08 07:07:43
品牌 Logo 应用领域
爱特美尔 - ATMEL 时钟外围集成电路
页数 文件大小 规格书
60页 917K
描述
RISC Microprocessor, 32-Bit, 600MHz, CMOS, CBGA483, 29 X 29 MM, 1.27 MM PITCH, ROHS COMPLIANT, CERAMIC, BGA-483

PCX7457VGHY600NC 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:BGA包装说明:BGA,
针数:483Reach Compliance Code:compliant
ECCN代码:3A001.A.3HTS代码:8542.31.00.01
风险等级:5.12其他特性:ALSO OPERATES AT 1.3V SUPPLY
地址总线宽度:36位大小:32
边界扫描:YES最大时钟频率:167 MHz
外部数据总线宽度:64格式:FLOATING POINT
集成缓存:YESJESD-30 代码:S-CBGA-B483
JESD-609代码:e1长度:29 mm
低功率模式:YES端子数量:483
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:BGA
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:2.8 mm速度:600 MHz
最大供电电压:1.15 V最小供电电压:1.05 V
标称供电电压:1.1 V表面贴装:YES
技术:CMOS端子面层:TIN SILVER COPPER
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:29 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

PCX7457VGHY600NC 数据手册

 浏览型号PCX7457VGHY600NC的Datasheet PDF文件第2页浏览型号PCX7457VGHY600NC的Datasheet PDF文件第3页浏览型号PCX7457VGHY600NC的Datasheet PDF文件第4页浏览型号PCX7457VGHY600NC的Datasheet PDF文件第5页浏览型号PCX7457VGHY600NC的Datasheet PDF文件第6页浏览型号PCX7457VGHY600NC的Datasheet PDF文件第7页 
Features  
3000 Dhrystone 2.1 MIPS at 1.3 GHz  
Selectable Bus Clock (30 CPU Bus Dividers up to 28x)  
13 Selectable Core-to-L3 Frequency Divisors  
Selectable MPx/60x Interface Voltage (1.8V, 2.5V)  
Selectable L3 Interface of 1.8V or 2.5V  
PD Typical 12.6W at 1 GHz at VDD = 1.3V; 8.3W at 1 GHz at VDD = 1.1V, Full Operating  
Conditions  
Nap, Doze and Sleep Modes for Power Saving  
Superscalar (Four Instructions Fetched Per Clock Cycle)  
4 GB Direct Addressing Range  
PowerPC 7457  
RISC  
Microprocessor  
Virtual Memory: 4 Hexabytes (252)  
64-bit Data and 36-bit Address Bus Interface  
Integrated L1: 36 KB Instruction and 32 KB Data Cache  
Integrated L2: 512 KB  
11 Independent Execution Units and Three Register Files  
Write-back and Write-through Operations  
fINT Max = 1 GHz (1.2 GHz to be Confirmed)  
fBUS Max = 133 MHz/166 MHz  
PC7457  
Description  
The PC7457 is implementations of the PowerPC® microprocessor family of reduced  
instruction set computer (RISC) microprocessors. This document describes pertinent  
electrical and physical characteristics of the PC7457.  
The PC7457 is the fourth implementation of the fourth generation (G4) microproces-  
sors from Freescale. The PC7457 implements the full PowerPC 32-bit architecture  
and is targeted at networking and computing systems applications. The PC7457 con-  
sists of a processor core, a 512 Kbyte L2, and an internal L3 tag and controller which  
support a glueless backside L3 cache through a dedicated high-bandwidth interface.  
The core is a high-performance superscalar design supporting a double-precision  
floating-point unit and a SIMD multimedia unit. The memory storage subsystem sup-  
ports the MPX bus interface to main memory and other system resources. The L3  
interface supports 1, 2, or 4M bytes of external SRAM for L3 cache and/or private  
memory data. For systems implementing 4M bytes of SRAM, a maximum of 2M bytes  
may be used as cache; the remaining 2M bytes must be private memory.  
Note that the PC7457 is a footprint-compatible, drop-in replacement in a PC7455  
application if the core power supply is 1.3V.  
Rev. 5345D–HIREL–07/06  

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