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PCA9655E PDF预览

PCA9655E

更新时间: 2024-11-14 12:49:07
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
20页 215K
描述
Remote 16-bit I/O Expander for I2C Bus with Interrupt

PCA9655E 数据手册

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PCA9655E  
Remote 16-bit I/O Expander  
for I2C Bus with Interrupt  
The PCA9655E provides 16 bits of General Purpose parallel Input /  
2
Output (GPIO) expansion through the I Cbus / SMBus.  
The PCA9655E consists of two 8bit Configuration (Input or  
Output selection); Input, Output and Polarity Inversion (activeHIGH  
or activeLOW operation) registers. At power on, all I/Os default to  
inputs. Each I/O may be configured as either input or output by writing  
to its corresponding I/O configuration bit. The data for each Input or  
Output is kept in its corresponding Input or Output register. The  
Polarity Inversion register may be used to invert the polarity of the  
read register. All registers can be read by the system master.  
The PCA9655E provides an opendrain interrupt output which is  
activated when any input state differs from its corresponding input  
port register state. The interrupt output is used to indicate to the system  
master that an input state has changed. The poweron reset sets the  
registers to their default values and initializes the device state  
machine.  
http://onsemi.com  
MARKING  
DIAGRAMS  
PCA9655E  
AWLYYWWG  
SOIC24  
DW SUFFIX  
CASE 751E  
PCA96  
55EG  
Three hardware pins (AD0, AD1, AD2) are used to configure the  
2
I Cbus slave address of the device. Up to 64 devices are allowed to  
AWLYYWW  
TSSOP24  
DT SUFFIX  
CASE 948H  
2
share the same I Cbus / SMBus.  
Features  
V Operating Range: 1.65 V to 5.5 V  
DD  
SDA Sink Capability: 30 mA  
5.5 V Tolerant I/Os  
PCA  
9655E  
ALYWG  
G
1
WQFN24  
MT SUFFIX  
CASE 485BG  
Polarity Inversion Register  
Active LOW Interrupt Output  
Low Standby Current  
Noise Filter on SCL/SDA Inputs  
No Glitch on Powerup  
XXXX = Specific Device Code  
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
WW, W = Work Week  
A
Internal Poweron Reset  
64 Programmable Slave Addresses Using Three Address Pins  
16 I/O Pins Which Default to 16 Inputs  
G or G = PbFree Package  
(Note: Microdot may be in either location)  
2
I C SCL Clock Frequencies Supported:  
Standard Mode: 100 kHz  
Fast Mode: 400 kHz  
Fast Mode +: 1 MHz  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 17 of this data sheet.  
ESD Performance: 2000 V Human Body Model,  
200 V Machine Model  
These are PbFree Devices  
© Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
May, 2012 Rev. 1  
PCA9655E/D  

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