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P752-312.5MHZ PDF预览

P752-312.5MHZ

更新时间: 2024-11-18 20:38:31
品牌 Logo 应用领域
CONNOR-WINFIELD 机械输出元件振荡器
页数 文件大小 规格书
2页 167K
描述
LVPECL Output Clock Oscillator, 312.5MHz Nom, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-6

P752-312.5MHZ 数据手册

 浏览型号P752-312.5MHZ的Datasheet PDF文件第2页 
High Frequency  
LVPECL Oscillator  
Model P752  
Features:  
Description:  
CW  
3.3 Vdc Operation  
The Connor-Winfield P752 is a 5x7 mm,  
3.3V LVPECL, Surface Mount, Crystal  
Controlled Oscillator (XO) designed for  
applications requiring low jitter,  
1038  
P752  
MHZ  
2111 Comprehensive Drive  
Frequency Tolerance: 100 ppm  
Temperature Range: -40 to 85°C  
LVPECL Output Logic  
312.5  
Aurora, Illinois 60505  
Phone: 630-851-4722  
+/-100 ppm, overall frequency tolerance  
and -40 to 85 °C operation. The P752 is  
designed using a PLL multiplier to achieve  
the high frequency output. The RoHS  
compliant surface mount package is  
optimum for mass production.  
Tri-State Enable/Disable Pad 1  
Low Jitter: <2 ps rms  
Ceramic Surface Mount Package  
Tape and Reel Packaging  
RoHS Compliant / Lead Free  
Fax: 630-851-5040  
www.conwin.com  
US Headquarters:  
630-851-4722  
European Headquarters:  
+353-61-472221  
Absolute Maximum Ratings  
Parameter  
Minimum  
-55  
Nominal  
Maximum  
125  
Units  
°C  
Vdc  
Vdc  
Notes  
Storage Temperature  
Supply Voltage (Vcc)  
Input Voltage  
-
-
-
-0.5  
-0.5  
4.6  
Vcc + 0.5  
Operating Specifications  
Parameter  
Minimum  
250  
-100  
-40  
3.135  
-
Nominal  
Maximum  
800  
Units  
MHz  
ppm  
°C  
Vdc  
mA  
Notes  
Output Frequency (Fo)  
Frequency Tolerance  
Operating Temp Range  
Supply Voltage (Vcc)  
Supply Current (Icc)  
Jitter:  
-
-
-
100  
85  
3.465  
100  
1
3.3  
60  
Period Jitter (Fo=800 MHz)  
Integrated Phase Jitter  
SSB Phase Noise (Fo=800 MHz)  
@ 100 Hz offset  
-
-
6
8
ps rms  
ps rms  
1.5  
2.0  
2
-
-
-
-
-
-
-90  
-110  
-115  
-110  
-110  
-
-
-
-
-
-
dBc/Hz  
dBc/Hz  
dBc/Hz  
dBc/Hz  
dBc/Hz  
ms  
@ 1 KHz offset  
@ 10 KHz offset  
@ 100 KHz offset  
@ 1 MHz offset  
Start-Up Time  
10  
Enable / Disable Input Characteristics  
Parameter  
Enable Input Voltage - (Vih)  
Disable Input Voltage - (Vil)  
Minimum  
2.275  
-
Nominal  
Maximum  
Units  
Vdc  
Vdc  
Notes  
-
-
-
3
3
1.68  
LVPECL Output Characteristics  
Parameter  
Minimum  
Nominal  
Maximum  
Units  
Ohm  
Vdc  
Vdc  
%
Notes  
Load  
-
-
50  
-
4
Voltage High (Voh)  
Low (Vol)  
Duty Cycle at 50% Level  
Rise / Fall Time: 20% to 80%  
2.275  
-
-
50  
-
-
-
45  
-
1.68  
55  
0.5  
5
ns  
Package Characteristics  
Hermetically sealed ceramic package and metal cover  
Package  
Notes:  
Bulletin  
Ec242  
1 of 2  
1.ꢀIncludesꢀcalibrationꢀ@ꢀ25°C,ꢀfrequencyꢀstabilityꢀvs.ꢀchangeꢀinꢀtemperature,ꢀsupplyꢀvoltageꢀandꢀloadꢀvariations,ꢀshockꢀandꢀvibrationꢀandꢀ20ꢀyearsꢀaging.  
Page  
ꢀ 2.ꢀBW=12ꢀKHzꢀtoꢀ20ꢀMHz,ꢀFo=800ꢀMHz.  
ꢀ 3.ꢀWhenꢀtheꢀoscillatorꢀisꢀdisabledꢀtheꢀoutputsꢀareꢀatꢀhighꢀimpedance.ꢀOutputsꢀareꢀenabledꢀwithꢀnoꢀconnectionꢀonꢀpadꢀ1.  
ꢀ 4.ꢀOutputsꢀmustꢀbeꢀterminatedꢀintoꢀ50ꢀohmsꢀtoꢀVcc-2VꢀorꢀTheveninꢀequivalent.  
ꢀꢀ 5.ꢀDutyꢀcycleꢀmeasuredꢀatꢀ50%ꢀofꢀoutputꢀvoltageꢀswing..  
Revision  
02  
Date  
20 Sept 2010  
Specifications subject to change without notice. All dimensions in inches. © Copyright 2010 The Connor-Winfield Corporation  

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