Datasheet > P5021NSE12QC

P5021NSE12QC

更新时间： 2024-11-06 17:42:19

品牌	Logo	应用领域
恩智浦 - NXP		外围集成电路
页数	文件大小	规格书
155页	2745K
描述
RISC PROCESSOR

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

P5021NSE12QC 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
包装说明：	BGA,	Reach Compliance Code：	compliant
风险等级：	5.32	地址总线宽度：	16
边界扫描：	YES	外部数据总线宽度：	64
格式：	FIXED POINT	集成缓存：	YES
JESD-30 代码：	S-PBGA-B1295	JESD-609代码：	e1
长度：	37.5 mm	低功率模式：	YES
端子数量：	1295	最高工作温度：	105 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装形状：	SQUARE
封装形式：	GRID ARRAY	峰值回流温度（摄氏度）：	NOT SPECIFIED
座面最大高度：	3.53 mm	速度：	2200 MHz
最大供电电压：	1.23 V	最小供电电压：	1.17 V
标称供电电压：	1.2 V	表面贴装：	YES
技术：	CMOS	温度等级：	OTHER
端子面层：	Tin/Silver/Copper (Sn/Ag/Cu)	端子形式：	BALL
端子节距：	1 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	37.5 mm
uPs/uCs/外围集成电路类型：	MICROPROCESSOR, RISC	Base Number Matches：	1

P5021NSE12QC 数据手册

Freescale Semiconductor

Data Sheet: Technical Data

Document Number: P5021

Rev. 0, 12/2013

P5021

P5021 QorIQ

Integrated Processor

Data Sheet

FC-PBGA–1295

37.5 mm × 37.5 mm

The P5021 QorIQ integrated communication processor

combines two Power Architecture® processor cores with

high-performance data path acceleration logic and network

and peripheral bus interfaces required for networking,

telecom/datacom, wireless infrastructure, and aerospace

applications.

• Serial ATA (SATA) 2.0 controller

• Enhanced secure digital host controller (SD/MMC)

• Enhanced serial peripheral interface (eSPI)

• Two high-speed USB 2.0 controllers with integrated PHYs

• RAID 5 and 6 storage accelerator with support for

end-to-end data protection information

• Data Path Acceleration Architecture (DPAA) incorporating

acceleration for the following functions:

– Frame Manager (FMan) for packet parsing,

classification, and distribution

This chip can be used for combined control, data path, and

application layer processing in routers, switches, base station

controllers, and general-purpose embedded computing. Its

high level of integration offers significant performance

benefits compared to multiple discrete devices while also

greatly simplifying board design.

– Queue Manager (QMan) for scheduling, packet

sequencing and congestion management

– Hardware Buffer Manager (BMan) for buffer allocation

and deallocation

The chip includes the following function and features:

– Encryption/Decryption

• 1295 FC-PBGA package

• Two e5500 Power Architecture cores

– Each core has a backside 512 KB L2 cache with ECC

– Three levels of instructions: user, supervisor, and

hypervisor

This figure shows the major functional units within the chip.

– Independent boot and reset

– Secure boot capability

• CoreNet fabric supporting coherent and non-coherent

transactions amongst CoreNet endpoints

• Frontside 2 MB CoreNet platform cache with ECC

• CoreNet bridges between the CoreNet fabric the I/Os,

datapath accelerators, and high and low speed peripheral

interfaces

• Two 10-Gigabit Ethernet (XAUI) controllers

• Ten 1-Gigabit Ethernet controllers

– SGMII, 2.5Gb/s SGMII and RGMII interfaces

• Two 64-bit DDR3/3L SDRAM memory controllers with

ECC

• Multicore programmable interrupt controller (PIC)

• Four I C controllers

• Four 2-pin UARTs or two 4-pin UARTs

• Two 4-channel DMA engines

• Enhanced local bus controller (eLBC)

• Three PCI Express 2.0 controllers/ports

Freescale reserves the right to change the detail specifications as may be required

to permit improvements in the design of its products.

12 3 4 5 6 7...155

中文翻译

下载PDF

与P5021NSE12QC相关器件

型号	品牌	获取价格	描述	数据表
P5021NSE72QC	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 2.2GHz, DDR3/3L w/ECC, PCIe, 1/10GbE, SATA, SEC, 0 to 90
P5021NSE7TMC	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 1.8GHz, DDR3/3Lw/ECC, PCIe, 1/10GbE, SATA, SEC, 0 to 105
P5021NSE7VNC	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 2.0GHz, DDR3/3Lw/ECC, PCIe, 1/10GbE, SATA, SEC, 0 to 105
P5021NSN12QB	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 2.2GHz, DDR3/3Lw/ECC, PCIe, 1/10GbE, SATA, 0 to 105C Rev
P5021NSN72QC	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 2.2GHz, DDR3/3L w/ECC, PCIe, 1/10GbE, SATA, 0 to 90C, Re
P5021NSN7TMC	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 1.8GHz, DDR3/3Lw/ECC, PCIe, 1/10GbE, SATA, 0 to 105C, Re
P5021NSN7VNC	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 2.0GHz, DDR3/3Lw/ECC, PCIe, 1/10GbE, SATA, 0 to 105C, Re
P5021NXE1TMB	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 1.8GHz, DDR3/3Lw/ECC, PCIe, 1/10GbE, SATA, SEC, -40 to 1
P5021NXE72QC	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 2.2GHz, DDR3/3L w/ECC, PCIe, 1/10GbE, SATA, SEC, -40-90C
P5021NXE7TMC	NXP	获取价格	QorIQ, 64-Bit Power Arch SoC, 2 X 1.8GHz, DDR3/3Lw/ECC, PCIe, 1/10GbE, SATA, SEC, -40 to 1

与P5021NSE12QC相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

14
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

12
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

36
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

33

产品中心

服务支持

精选活动

关于我们

帮助中心

P5021NSE12QC

P5021NSE12QC 技术参数

P5021NSE12QC 数据手册

与P5021NSE12QC相关器件

与P5021NSE12QC相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

P5021NSE12QC

P5021NSE12QC 技术参数

P5021NSE12QC 数据手册

与P5021NSE12QC相关器件

与P5021NSE12QC相关文章

您还可以找

您在本页遇到什么问题？