Nexperia
NXT4556AUR
SIM card interface level translator
aaa-034373
3.5
3.5
V
IO_SIM
V
_
V
_
(V)
IO HOST
(V)
IO SIM
2.5
2.5
1.5
0.5
-0.5
V
IO_HOST
1.5
0.5
-0.5
-200
-100
0
100
200
t (ns)
Fig. 4. LOW to HIGH transition for IO_HOST to IO_SIM communication
Looking at the input signal, the first part of the LOW to HIGH transition is an exponential curve
caused by the I/O node capacitance being charged via the pull-up resistor. The second part starts
when the input signal crosses the input switching level. The rising edge is accelerated dramatically
by the PMOST that is turned on by the one shot on the input side.
In case of a communication error or some other unforeseen incident that may drive both connected
sides of the drivers at the same time, the internal logic automatically prevents stuck-at situation.
This ensures that both I/Os will return to HIGH level once released from being driven LOW.
In shut down mode, the control circuit disables all output stages. Additionally, in shut down mode,
the pull-up resistor on IO_SIM side is disabled, and all pull-down resistors Rpd on SIM side are
enabled, pulling LOW the pins on the SIM side. The shut down sequence is explained in more
detail in Section 8.3.
8.3. Shutdown sequence
The ISO 7816-3 specification specifies the shutdown sequence for the SIM card signals to ensure
that the card is properly disabled for power savings. Also, during hot swap, the orderly shutdown of
these signals helps to avoid any improper write and corruption of data.
When VCC_SIM drops below Vdis(UVLO_AC), the shutdown sequence is initiated. Fig. 5 illustrates the
shutdown sequence initiated by VCC_SIM being powered down.
The shut down sequence starts by pulling down the RST_SIM output. Once RST_SIM is turned
LOW, CLK_SIM and IO_SIM are pulled LOW sequentially, one-by-one. Internal pull-down resistors
on the SIM pins are used to pull the SIM channels LOW. The internal pull-down resistors, Rpd, that
pull down the three pins on the SIM side are shown in Fig. 1. The shutdown sequence is completed
in a few microseconds. The interval time (Δt), is typically 4 μs.
©
NXT4556AUR
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 1 — 5 December 2023
6 / 19