Nexperia
NXT4556AUR
SIM card interface level translator
8. Functional description
8.1. Function table
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level, X = don't care.
VCC_HOST
VCC_SIM
Operation
IO_HOST
RST_SIM
CLK_SIM
IO_SIM
Rpu = 20 kΩ; L/H
Rpd = 400 Ω
Rpd = 400 Ω
1.08 V to 1.98 V 1.62 V to 3.3 V
OPERATIONAL Rpu = 20 kΩ; L/H
L/H
L/H
1.08 V to 1.98 V
0 V
0 V
SHUT DOWN
SHUT DOWN
Rpu = 20 kΩ
undefined
Rpd = 400 Ω Rpd = 400 Ω
Rpd = 400 Ω Rpd = 400 Ω
1.62 V to 3.3 V
When both VCC_HOST and VCC_SIM are biased in the recommended range the product is operational
and parameters are specified. Pull up resistors (Rpu) are enabled on IO_HOST and IO_SIM but
additionally high drive output (L/H) can appear, overruling the Rpu = 20 kΩ. Operation of the
channels in operational mode is explained in Section 8.2.
When VCC_SIM drops below 86% of VCC, the shutdown sequence is initiated. This shutdown
sequence is described in Section 8.3. For this partial power down mode the parameters Rpd and
ICC_HOST are defined for VCC_SIM = 0 V.
When VCC_HOST drops out, the product also turns to shut down mode. For this partial power down
mode the parameters Rpd and ICC_SIM are defined for VCC_HOST = 0 V.
8.2. Operational mode
The functional diagram of the NXT4556AUR is shown in Fig. 1.
The upper part of Fig. 1 shows the RST and CLK channels which are uni-directional level shifters
from the host to the SIM card side.
The bottom part shows the architecture of the bidirectional I/O channel. Both on IO_HOST and
IO_SIM a resistor Rpu pulls up the I/O node. On both sides an output stage is present that consists
of a PMOST and an NMOST device. Each output stage drives the output through a series resistor
RS. Input stages sense the I/O nodes and pass LOW/HIGH information to the control logic that
controls the translator outputs and several pull-up and pull-down resistors.
The NXT4556AUR I/O channel does not require a dedicated input signal to control the direction
of data flow from IO_HOST to IO_SIM or from IO_SIM to IO_HOST. Change in driving direction
is possible when both sides are at HIGH state. The control logic recognizes the I/O node with the
first falling edge and grants control over the opposite I/O node. When for example the IO_HOST is
turned LOW, the control circuit will turn on the NMOST on the IO_SIM side, pulling LOW IO_SIM.
The IO_SIM pin is then an output only, until IO_HOST is turned HIGH and the translator has turned
IO_SIM HIGH again.
The PMOST devices are used to actively turn high the outputs. Each PMOST is driven by a one-
shot circuit that generates a pulse. For example: Assuming HOST to SIM communication, when
the IO_HOST is turned HIGH, it will activate the one shot circuit on the IO_SIM side. A pulse starts,
arranging a fast LOW to HIGH transition on IO_SIM. When the pulse has finished, the PMOST
is released. At that stage, the system returns to a standard open drain state whereby the pull
resistors keep the I/O nodes HIGH.
At the same time, at a LOW to HIGH transition, the one shot on the input side is activated as well.
In an open drain application, this creates a typical input LOW to HIGH waveform. Fig. 4 shows an
example of a LOW to HIGH transition in an open drain application.
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NXT4556AUR
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Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 1 — 5 December 2023
5 / 19