DATA SHEET
www.onsemi.com
MOSFET - Power, Single
N-Channel, DFN5/DFNW5
60 V, 4.6 mW, 92 A
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
60 V
4.6 mW @ 10 V
92 A
NVMFS5C645N
D (5)
Features
• Small Footprint (5x6 mm) for Compact Design
G (4)
• Low R
to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
G
S (1,2,3)
N−CHANNEL MOSFET
• NVMFS5C645NWF − Wettable Flank Option for Enhanced Optical
Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MARKING
DIAGRAM
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
D
DFN5
CASE 488AA
Parameter
Drain−to−Source Voltage
Symbol
Value
60
Unit
V
S
D
D
1
XXXXXX
AYWZZ
S
S
V
DSS
Gate−to−Source Voltage
V
GS
20
V
DFNW5
CASE 507BA
G
D
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
I
92
A
C
D
q
JC
T
C
65
(Notes 1, 3)
Steady
State
XXXXXX = 5C645N
Power Dissipation
T
C
P
79
W
A
XXXXXX = (NVMFS5C645N) or
XXXXXX = 645NWF
XXXXXX = (NVMFS5C645NWF)
D
R
(Note 1)
q
JC
T
C
= 100°C
40
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceability
Continuous Drain
Current R
T = 25°C
I
20
A
D
q
JA
T = 100°C
A
14
(Notes 1, 2, 3)
Steady
State
Power Dissipation
T = 25°C
A
P
3.7
1.8
820
W
D
R
(Notes 1 & 2)
q
JA
T = 100°C
A
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
A
p
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
Operating Junction and Storage Temperature
T , T
−55 to
+175
°C
J
stg
Source Current (Body Diode)
I
100
185
A
S
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Energy (I
= 5 A)
L(pk)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
1.9
Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
R
41
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
September, 2021 − Rev. 1
NVMFS5C645N/D