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54F410LM PDF预览

54F410LM

更新时间: 2024-09-16 22:36:23
品牌 Logo 应用领域
美国国家半导体 - NSC 内存集成电路静态存储器
页数 文件大小 规格书
8页 136K
描述
Register Stacká16 x 4 RAM TRI-STATEE Output Register

54F410LM 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DFP, LCC20,.35SQReach Compliance Code:unknown
ECCN代码:3A001.A.2.CHTS代码:8542.32.00.41
风险等级:5.91最长访问时间:12 ns
JESD-30 代码:R-GDFP-F20JESD-609代码:e0
内存密度:64 bit内存集成电路类型:STANDARD SRAM
内存宽度:4功能数量:1
端口数量:1端子数量:20
字数:16 words字数代码:16
工作模式:SYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:16X4
输出特性:3-STATE可输出:YES
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装等效代码:LCC20,.35SQ封装形状:RECTANGULAR
封装形式:FLATPACK并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:2.286 mm
子类别:Other Memory ICs最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.731 mmBase Number Matches:1

54F410LM 数据手册

 浏览型号54F410LM的Datasheet PDF文件第2页浏览型号54F410LM的Datasheet PDF文件第3页浏览型号54F410LM的Datasheet PDF文件第4页浏览型号54F410LM的Datasheet PDF文件第5页浏览型号54F410LM的Datasheet PDF文件第6页浏览型号54F410LM的Datasheet PDF文件第7页 
August 1995  
54F/74F410 Register StackÐ16 x 4 RAM  
TRI-STATE Output Register  
É
General Description  
The ’F410 is a register-oriented high-speed 64-bit Read/  
Write Memory organized as 16-words by 4-bits. An edge-  
triggered 4-bit output register allows new input data to be  
written while previous data is held. TRI-STATE outputs are  
provided for maximum versatility. The ’F410 is fully compati-  
ble with all TTL families.  
Features  
Y
Edge-triggered output register  
Y
Typical access time of 35 ns  
Y
TRI-STATE outputs  
Y
Optimized for register stack operation  
Y
18-pin package  
Y
9410 replacement  
Package  
Commercial  
Military  
Package Description  
Number  
74F410PC  
N18A  
18-Lead (0.300 Wide) Molded Dual-In-Line  
×
54F410DM (Note 1)  
J18A  
18-Lead Ceramic Dual-In-Line  
74F410SC  
54F410LM  
M20B  
W20A  
20-Lead (0.300 Wide) Molded Small Outline, JEDEC  
×
20-Lead Cerpak  
e
Note 1: Military grade device with environmental and burn-in processing. Use suffix  
DMQB, LMQB  
Logic Symbol  
Connection Diagrams  
Pin Assignment  
for DIP and SOIC  
Pin Assignment  
for LCC  
TL/F/9538–2  
TL/F/9538–3  
TL/F/9538–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9538  
RRD-B30M105/Printed in U. S. A.  

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