Datasheet > NS16C2552TVS/NOPB

NS16C2552TVS/NOPB

更新时间： 2024-11-06 11:12:27

品牌	Logo	应用领域
德州仪器 - TI		先进先出芯片
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描述
具有 16 字节 FIFO、数据速率高达 5 兆位/秒的双路 UART \| PFB \| 48 \| -40 to 85

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数据手册
替代型号

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NS16C2552, NS16C2752

www.ti.com

SNLS238D –AUGUST 2006–REVISED APRIL 2013

NS16C2552/NS16C2752 Dual UART with 16-byte/64-byte FIFO's and up to 5 Mbit/s Data

Rate

Check for Samples: NS16C2552, NS16C2752

FEATURES

•

Multi-Function Output Allows More Package

Functions with Fewer I/O Pins

•

Dual Independent UART

44-PLCC or 48-TQFP Package

•

Up to 5 Mbits/s Data Transfer Rate

2.97 V to 5.50 V Operational Vcc

DESCRIPTION

The NS16C2552 and NS16C2752 are dual channel

Universal

5 V Tolerant I/Os in the Entire Supply Voltage

Range

Asynchronous

Receiver/Transmitter

•

Industrial Temperature: -40°C to 85°C

(DUART). The footprint and the functions are

compatible to the PC16552D, while new features are

added to the UART device. These features include

low voltage support, 5V tolerant inputs, enhanced

features, enhanced register set, and higher data rate.

Default Registers are Identical to the

PC16552D

•

NS16C2552/NS16C2752 is Pin-to-Pin

Compatible to TI PC16552D, EXAR ST16C2552,

XR16C2552, XR 16L2552, and Phillips

SC16C2552B

The two serial channels are completely independent

of each other, except for a common CPU interface

and crystal input. On power-up both channels are

functionally identical to the PC16552D. Each channel

can operate with on-chip transmitter and receiver

FIFO’s (in FIFO mode).

•

NS16C2752 is Compatible to EXAR

XR16L2752, and Register Compatible to

Phillips SC16C752

•

Auto Hardware Flow Control (Auto-CTS, Auto-

RTS)

In the FIFO mode each channel is capable of

buffering 16 bytes (for NS16C2552) or 64 bytes (for

NS16C2752) of data in both the transmitter and

receiver. The receiver FIFO also has additional 3 bits

of error data per location. All FIFO control logic is on-

chip to minimize system software overhead and

maximize system efficiency.

Auto Software Flow Control (Xon, Xoff, and

Xon-any)

Fully Programmable Character Length (5, 6, 7,

or 8) with Even, Odd, or No Parity, Stop Bit

Adds or Deletes Standard Asynchronous

Communication Bits (Start, Stop, and Parity) to

or from the Serial Data

To improve the CPU processing bandwidth, the data

transfers between the DUART and the CPU can be

done using DMA controller. Signaling for DMA

transfers is done through two pins per channel

(TXRDY and RXRDY). The RXRDYfunction is

multiplexed on one pin with the OUT2 and BAUDOUT

functions. The configuration is through Alternate

Function Register.

•

Independently Controlled and Prioritized

Transmit and Receive Interrupts

•

Complete Line Status Reporting Capabilities

Line Break Generation and Detection

Internal Diagnostic Capabilities

The fundamental function of the UART is converting

between parallel and serial data. Serial-to-parallel

conversion is done on the UART receiver and

parallel-to-serial conversion is done on the

transmitter. The CPU can read the complete status of

each channel at any time. Status information reported

includes the type and condition of the transfer

operations being performed by the DUART, as well

as any error conditions (parity, overrun, framing, or

break interrupt).

–

Loopback Controls for Communications

Link Fault Isolation

–

Break, Parity, Overrun, Framing Error

Detection

•

Programmable Baud Generators Divide any

Input Clock by 1 to (2¹⁶- 1) and Generate the

16 X clock

•

IrDA v1.0 Wireless Infrared Encoder/Decoder

DMA Operation (TXRDY/RXRDY)

Concurrent Write to DUART Internal Register

Channels 1 and 2

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...56

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NS16C2552TVS/NOPB 替代型号

型号	品牌	替代类型	描述	数据表
NS16C2552TVSX/NOPB	TI	完全替代	具有 16 字节 FIFO、数据速率高达 5 兆位/秒的双路 UART \| PFB \| 4

与NS16C2552TVS/NOPB相关器件

型号	品牌	获取价格	描述	数据表
NS16C2552TVSX	NSC	获取价格	IC 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48, TQFP-48, Serial IO/Communication
NS16C2552TVSX/NOPB	TI	获取价格	具有 16 字节 FIFO、数据速率高达 5 兆位/秒的双路 UART \| PFB \| 4
NS16C2752	NSC	获取价格	Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate
NS16C2752	TI	获取价格	具有 64 字节 FIFO、数据速率高达 5 兆位/秒的双路 UART
NS16C2752TVA	NSC	获取价格	Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate
NS16C2752TVA/NOPB	TI	获取价格	具有 64 字节 FIFO、数据速率高达 5 兆位/秒的双路 UART \| FN \| 44
NS16C2752TVAX/NOPB	TI	获取价格	Dual UART with 64-byte FIFO and up to 5 Mbit/s Data Rate 44-PLCC -40 to 85
NS16C2752TVS/NOPB	TI	获取价格	具有 64 字节 FIFO、数据速率高达 5 兆位/秒的双路 UART \| PFB \| 4
NS16C2752TVSX/NOPB	TI	获取价格	具有 64 字节 FIFO、数据速率高达 5 兆位/秒的双路 UART \| PFB \| 4
NS16C450	ETC	获取价格	Communications Interface

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