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NM27LV210V250 PDF预览

NM27LV210V250

更新时间: 2024-11-06 20:01:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD OTP只读存储器内存集成电路
页数 文件大小 规格书
9页 78K
描述
OTP ROM, 64KX16, 250ns, CMOS, PQCC44, PLASTIC, LCC-44

NM27LV210V250 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:LCC包装说明:QCCJ, LDCC44,.7SQ
针数:44Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.86最长访问时间:250 ns
I/O 类型:COMMONJESD-30 代码:S-PQCC-J44
JESD-609代码:e0长度:16.51 mm
内存密度:1048576 bit内存集成电路类型:OTP ROM
内存宽度:16功能数量:1
端子数量:44字数:65536 words
字数代码:64000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:64KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC44,.7SQ封装形状:SQUARE
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:4.57 mm
最大待机电流:0.00005 A子类别:OTP ROMs
最大压摆率:0.02 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:16.51 mmBase Number Matches:1

NM27LV210V250 数据手册

 浏览型号NM27LV210V250的Datasheet PDF文件第2页浏览型号NM27LV210V250的Datasheet PDF文件第3页浏览型号NM27LV210V250的Datasheet PDF文件第4页浏览型号NM27LV210V250的Datasheet PDF文件第5页浏览型号NM27LV210V250的Datasheet PDF文件第6页浏览型号NM27LV210V250的Datasheet PDF文件第7页 
July 1998  
NM27LV210  
1,048,576-Bit (64K x 16) Low Voltage EPROM  
General Description  
Features  
The NM27LV210 is a high performance Low Voltage Electrical  
Programmable read only memory. It is manufactured using  
Fairchild’s latest EPROM technology. This technology allows the  
part to operate at high speeds.  
3.0V to 3.6V operation  
200 ns, 250 ns maximum access time  
Low current operation  
20mA ICC active current @ 5 MHz  
50µA ICC standby current @ 5 MHz  
This Low Voltage and Low Power EPROM is designed with power  
sensitive hand held and portable battery products in mind. This  
allows for code storage of firmware for applications like notebook  
computers, palm top computers, cellular phones, and HDD.  
Ultra low power operation  
60 µA standby power @ 3.3V  
50 mW active power @ 3.3V  
The NM27LV210 is one member of Fairchild’s growing Low  
Voltage product family.  
Surface mount package option  
44-Pin PLCC  
Block Diagram  
V
cc  
Data Outputs O - O  
0
15  
GND  
V
pp  
OE  
PGM  
CE  
Output Enable  
Chip Enable, and  
Program Logic  
Output  
Buffers  
Y
Decoder  
1,048,576-Bit  
Cell Matrix  
A
- A  
0
15  
Address  
Inputs  
X
Decoder  
DS011376-1  
1
© 1998 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  

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