Datasheet > NLVVHC1GT04DFT2G

NLVVHC1GT04DFT2G

更新时间： 2024-11-24 12:34:19

品牌	Logo	应用领域
安森美 - ONSEMI		转换器电平转换器
页数	文件大小	规格书
6页	127K
描述
Inverting Buffer CMOS Logic Level Shifter

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NLVVHC1GT04DFT2G 数据手册

MC74VHC1GT04

Inverting Buffer /

CMOS Logic Level Shifter

LSTTL−Compatible Inputs

The MC74VHC1GT04 is a single gate inverting buffer fabricated

with silicon gate CMOS technology. It achieves high speed operation

similar to equivalent Bipolar Schottky TTL while maintaining CMOS

low power dissipation.

http://onsemi.com

MARKING

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output.

The device input is compatible with TTL−type input thresholds and

the output has a full 5 V CMOS level output swing. The input protection

circuitry on this device allows overvoltage tolerance on the input,

allowing the device to be used as a logic−level translator from 3 V

CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V

CMOS Logic while operating at the high−voltage power supply.

The MC74VHC1GT04 input structure provides protection when

voltages up to 7.0 V are applied, regardless of the supply voltage. This

allows the MC74VHC1GT04 to be used to interface 5 V circuits to

3 V circuits. The output structures also provide protection

DIAGRAMS

SC−88A

DF SUFFIX

CASE 419A

VK M G

TSOP−5

DT SUFFIX

CASE 483

VK M G

when V = 0 V. These input and output structures help prevent

device destruction caused by supply voltage − input/output voltage

mismatch, battery backup, hot insertion, etc.

VK = Device Code

= Date Code*

= Pb−Free Package

Features

• High Speed: t = 3.8 ns (Typ) at V = 5 V

(Note: Microdot may be in either location)

• Low Power Dissipation: I = 1 mA (Max) at T = 25°C

*Date Code orientation and/or position may vary

depending upon manufacturing location.

• TTL−Compatible Inputs: V = 0.8 V; V = 2 V

• CMOS−Compatible Outputs: V > 0.8 V ; V < 0.1 V @ Load

CC OL

• Power Down Protection Provided on Inputs and Outputs

• Balanced Propagation Delays

• Pin and Function Compatible with Other Standard Logic Families

• Chip Complexity: FETs = 105; Equivalent Gates = 26

• NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

PIN ASSIGNMENT

IN A

GND

OUT Y

• These Devices are Pb−Free and are RoHS Compliant

FUNCTION TABLE

A Input

Y Output

IN A

GND

OUT Y

ORDERING INFORMATION

Figure 1. Pinout (Top View)

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

IN A

OUT Y

Figure 2. Logic Symbol

Publication Order Number:

February, 2013 − Rev. 16

MC74VHC1GT04/D

12 3 4 5 6

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与NLVVHC1GT04DFT2G相关器件

型号	品牌	获取价格	描述	数据表
NLVVHC1GT04DTT1G	ONSEMI	获取价格	Single Inverter, TTL Level
NLVVHC1GT08DFT1G	ONSEMI	获取价格	2-Input AND Gate/CMOS Logic Level Shifter
NLVVHC1GT08DFT2G	ONSEMI	获取价格	2-Input AND Gate/CMOS Logic Level Shifter
NLVVHC1GT08DTT1G	ONSEMI	获取价格	2-Input AND Gate/CMOS Logic Level Shifter
NLVVHC1GT125DF1G	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter
NLVVHC1GT125DF2G	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter
NLVVHC1GT125DT1G	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter
NLVVHC1GT126DF1G	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter with LSTTL.Compatible Inputs
NLVVHC1GT126DF2G	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter with LSTTL.Compatible Inputs
NLVVHC1GT126DT1G	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter with LSTTL.Compatible Inputs

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