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NC7SP17P5X PDF预览

NC7SP17P5X

更新时间: 2024-11-03 22:45:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
9页 309K
描述
TinyLogic ULP Single Buffer with Schmitt Trigger Input

NC7SP17P5X 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SC-70
包装说明:TSSOP, TSSOP5/6,.08针数:5
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:3.19
系列:PJESD-30 代码:R-PDSO-G5
JESD-609代码:e3长度:2 mm
负载电容(CL):30 pF逻辑集成电路类型:BUFFER
最大I(ol):0.0005 A湿度敏感等级:1
功能数量:1输入次数:1
端子数量:5最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:1.2/3.3 VProp。Delay @ Nom-Sup:46.3 ns
传播延迟(tpd):46.3 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:1.1 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.9 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:1.25 mmBase Number Matches:1

NC7SP17P5X 数据手册

 浏览型号NC7SP17P5X的Datasheet PDF文件第2页浏览型号NC7SP17P5X的Datasheet PDF文件第3页浏览型号NC7SP17P5X的Datasheet PDF文件第4页浏览型号NC7SP17P5X的Datasheet PDF文件第5页浏览型号NC7SP17P5X的Datasheet PDF文件第6页浏览型号NC7SP17P5X的Datasheet PDF文件第7页 
July 2002  
Revised March 2003  
NC7SP17  
TinyLogic ULP Single Buffer with Schmitt Trigger Input  
General Description  
Features  
The NC7SP17 is a single buffer with Schmitt trigger  
input from Fairchild’s Ultra Low Power (ULP) Series of  
TinyLogic . Ideal for applications where battery life is criti-  
cal, this product is designed for ultra low power consump-  
0.9V to 3.6V VCC supply operation  
3.6V overvoltage tolerant I/O’s at VCC from 0.9V to 3.6V  
tPD  
tion within the VCC operating range of 0.9V to 3.6V VCC  
.
4.0 ns typ for 3.0V to 3.6V VCC  
5.0 ns typ for 2.3V to 2.7V VCC  
6.0 ns typ for 1.65V to 1.95V VCC  
7.0 ns typ for 1.40V to 1.60V VCC  
11.0 ns typ for 1.10V to 1.30V VCC  
27.0 ns typ for 0.90V VCC  
The internal circuit is composed of a minimum of inverter  
stages, including the output buffer, to enable ultra low static  
and dynamic power.  
The NC7SP17, for lower drive requirements, is uniquely  
designed for optimized power and speed, and is fabricated  
with an advanced CMOS technology to achieve best in  
class speed operation while maintaining extremely low  
CMOS power dissipation.  
Power-Off high impedance inputs and outputs  
Static Drive (IOH/IOL  
)
±2.6 mA @ 3.00V VCC  
±2.1 mA @ 2.30V VCC  
±1.5 mA @ 1.65V VCC  
±1.0 mA @ 1.40V VCC  
±0.5 mA @ 1.10V VCC  
±20 µA @ 0.9V VCC  
Uses patented Quiet Series noise/EMI reduction  
circuitry  
Ultra small MicroPak leadfree package  
Ultra low dynamic power  
Ordering Code:  
Package  
Number  
MAA05A  
MAC06A  
Product Code  
Top Mark  
P17  
Order Number  
Package Description  
Supplied As  
NC7SP17P5X  
NC7SP17L6X  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel  
K4  
6-Lead MicroPak, 1.0mm Wide  
5k Units on Tape and Reel  
Battery Life vs. V Supply Voltage  
CC  
TinyLogic ULP and ULP-A with up to 50% less power consumption can  
extend your battery life significantly.  
Battery Life = (Vbattery *Ibattery*.9)/(Pdevice)/24hrs/day  
Where, Pdevice = (ICC * VCC) + (CPD + CL) * VCC2 * f  
Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and  
derated 90% and device frequency at 10MHz, with CL = 15 pF load  
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.  
Quiet Series and MicroPak are trademarks of Fairchild Semiconductor Corporation.  
© 2003 Fairchild Semiconductor Corporation  
DS500674  
www.fairchildsemi.com  

NC7SP17P5X 替代型号

型号 品牌 替代类型 描述 数据表
NC7SP17P5X ONSEMI

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TinyLogic ULP单通道缓冲器(带施密特触发器输入)
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