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NC7SP38P5X_NL PDF预览

NC7SP38P5X_NL

更新时间: 2024-09-30 20:36:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路
页数 文件大小 规格书
11页 300K
描述
NAND Gate, HC/UH Series, 1-Func, 2-Input, CMOS, PDSO5, 1.25 MM, LEAD FREE, EIAJ, SC-88A, SC-70, 5 PIN

NC7SP38P5X_NL 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP,针数:5
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.51系列:HC/UH
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2 mm逻辑集成电路类型:NAND GATE
功能数量:1输入次数:2
端子数量:5最高工作温度:85 °C
最低工作温度:-40 °C输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):43 ns认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.9 V标称供电电压 (Vsup):1.2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:1.25 mm
Base Number Matches:1

NC7SP38P5X_NL 数据手册

 浏览型号NC7SP38P5X_NL的Datasheet PDF文件第2页浏览型号NC7SP38P5X_NL的Datasheet PDF文件第3页浏览型号NC7SP38P5X_NL的Datasheet PDF文件第4页浏览型号NC7SP38P5X_NL的Datasheet PDF文件第5页浏览型号NC7SP38P5X_NL的Datasheet PDF文件第6页浏览型号NC7SP38P5X_NL的Datasheet PDF文件第7页 
September 2008  
NC7SP38  
TinyLogic® ULP 2-Input NAND Gate (Open Drain Output)  
Features  
General Description  
0.9V to 3.6V V supply operation  
The NC7SP38 is a single 2-Input NꢀND Gate with  
open drain output stage from Fairchild’s Ultra Low  
Power (ULP) Series of TinyLogic . Ideal for applications  
where battery life is critical, this product is designed for  
CC  
3.6V overvoltage tolerant I/O’s at V from 0.9V to  
CC  
3.6V  
t  
:
PD  
ultra low power consumption within the V  
operating  
CC  
– 3.0ns typ. for 3.0V to 3.6V V  
– 4.0ns typ. for 2.3V to 2.7V V  
CC  
range of 0.9V to 3.6V V  
.
CC  
CC  
The internal circuit is composed of a minimum of inverter  
stages including the output buffer, to enable ultra low  
static and dynamic power.  
– 5.0ns typ. for 1.65V to 1.95V V  
– 6.0ns typ. for 1.40V to 1.60V V  
– 9.0ns typ. for 1.10V to 1.30V V  
CC  
CC  
CC  
The NC7SP38, for lower drive requirements, is uniquely  
designed for optimized power and speed, and is fabri-  
cated with an advanced CMOS technology to achieve  
best in class speed operation while maintaining  
extremely low CMOS power dissipation.  
– 24.0ns typ. for 0.90V V  
CC  
Power-off high impedance inputs and outputs  
Static drive (I /I ):  
OH OL  
2.6mꢀ @ 3.00V V  
2.1mꢀ @ 2.30V V  
1.5mꢀ @ 1.65V V  
1.0mꢀ @ 1.40V V  
0.5mꢀ @ 1.10V V  
CC  
CC  
CC  
CC  
CC  
20ꢁꢀ @ 0.9V V  
CC  
Uses patented Quiet Series™ noise/EMI reduction  
circuitry  
Ultra small MicroPak™ package  
Ultra low dynamic power  
Ordering Information  
Order  
Number  
Package  
Number  
Package Code  
Top Mark  
Package Description  
Supplied As  
NC7SP38P5X  
NC7SP38L6X  
Mꢀꢀ05ꢀ  
P38  
5-Lead SC70, EIꢀJ SC-88a,  
1.25mm Wide  
3k Units on Tape and Reel  
MꢀC06ꢀ  
K7  
6-Lead MicroPak, 1.0mm Wide 5k Units on Tape and Reel  
ꢀll packages are lead free per JEDEC: J-STD-020B standard.  
Battery Life vs. V Supply Voltage  
CC  
700  
TinyLogic ULP and ULP-ꢀ with up to 50% less power consumption can  
extend your battery life significantly.  
600  
ULP (SP)  
500  
Battery Life  
(Days)  
400  
300  
200  
100  
0
Battery Life = (V  
x I  
x 0.9) / (P ) / 24hrs/day  
device  
battery  
battery  
2
Where, P  
= (I  
x V ) + (C + C ) x V  
x f  
ULP-A (SV)  
device  
CC  
CC  
PD  
L
CC  
UHS (SZ)  
ꢀssumes ideal 3.6V Lithium Ion battery with current rating of 900mꢀH  
and derated 90% and device frequency at 10MHz, with C = 15pF load.  
L
0.9 1.2 1.5 1.8  
2.5 3.3 5.0  
VCC Supply Voltage  
©2004 Fairchild Semiconductor Corporation  
NC7SP38 Rev. 1.0.0  
www.fairchildsemi.com  

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