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NB7VQ1006MMNHTBG

更新时间： 2024-11-14 05:51:55

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
10页	165K
描述
1.8V / 2.5V 10Gbps Equalizer Receiver with 1:6 Differential CML Outputs

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NB7VQ1006MMNHTBG 数据手册

NB7VQ1006M

1.8V / 2.5V 10Gbps

Equalizer Receiver with 1:6

Differential CML Outputs

Multi−Level Inputs w/ Internal Termination

http://onsemi.com

Description

MARKING

DIAGRAM*

The NB7VQ1006M is a high performance differential 1:6 CML

fanout buffer with a selectable Equalizer receiver. When placed in

series with a Data path operating up to 10 Gb/s, the NB7VQ1006M

will compensate the degraded data signal transmitted across a FR4

PCB backplane or cable interconnect and output six identical CML

copies of the input signal. Therefore, the serial data rate is increased by

reducing Inter−Symbol Interference (ISI) caused by losses in copper

interconnect or long cables.

QFN−24

MN SUFFIX

CASE 485L

NB7V

Q1006M

ALYWG

The EQualizer ENable pin (EQEN) allows the IN/IN inputs to either

flow through or bypass the Equalizer section. Control of the Equalizer

function is realized by setting EQEN; When EQEN is set Low, the

IN/IN inputs bypass the Equalizer. When EQEN is set High, the IN/IN

inputs flow through the Equalizer. The default state at startup is LOW.

As such, the NB7VQ1006M is ideal for SONET, GigE, Fiber Channel,

Backplane and other Data distribution applications.

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

(Note: Microdot may be in either location)

The differential inputs incorporate internal 50 W termination

resistors that are accessed through the VT pin. This feature allows the

NB7VQ1006M to accept various logic level standards, such as

LVPECL, CML or LVDS. This feature provides transmission line

termination at the receiver, eliminating external components. The

outputs have the flexibility of being powered by either a 1.8 V or 2.5 V

supply.

*For additional marking information, refer to

Application Note AND8002/D.

The NB7VQ1006M is a member of the GigaComm™ family of high

performance Clock/Data products.

Features

• Maximum Input Data Rate > 10 Gbps

• Maximum Input Clock Frequency > 7.5 GHz

• Backplane and Cable Interconnect Compensation

• 225 ps Typical Propagation Delay

SIMPLIFIED BLOCK DIAGRAM

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 9 of this data sheet.

• 30 ps Typical Rise and Fall Times

• Differential CML Outputs, 400 mV Peak−to−Peak, Typical

• Operating Range: V = 1.71 V to 2.625 V, GND = 0 V

• Internal Input Termination Resistors, 50 W

• QFN−24 Package, 4 mm x 4 mm

• −40°C to +85°C Ambient Operating Temperature

• These are Pb−Free Devices*

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Publication Order Number:

June, 2010 − Rev. 2

NB7VQ1006M/D

12 3 4 5 6 7...10

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与NB7VQ1006MMNHTBG相关器件

型号	品牌	获取价格	描述	数据表
NB7VQ1006MMNTXG	ONSEMI	获取价格	1.8V / 2.5V 10Gbps Equalizer Receiver with 1:6 Differential CML Outputs
NB7VQ14M	ONSEMI	获取价格	MultiâLevel Inputs Internal Termination
NB7VQ14MMNG	ONSEMI	获取价格	MultiâLevel Inputs Internal Termination
NB7VQ14MMNHTBG	ONSEMI	获取价格	MultiâLevel Inputs Internal Termination
NB7VQ14MMNTXG	ONSEMI	获取价格	Clock / Data CML Fanout Buffer, 1:4 Differential, 1.8 V / 2.5 V / 3.3 V, 8 GHz, 14 Gbps, w
NB7VQ572M	ONSEMI	获取价格	1.8V / 2.5V /3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Tr
NB7VQ572MMNG	ONSEMI	获取价格	1.8V / 2.5V /3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Tr
NB7VQ572MMNR4G	ONSEMI	获取价格	1.8V / 2.5V /3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Tr
NB7VQ58M	ONSEMI	获取价格	1.8V / 2.5V / 3.3V Differential 2:1 Clock/Data Multiplexer / Translator with CML Outputs
NB7VQ58MMNG	ONSEMI	获取价格	1.8V / 2.5V / 3.3V Differential 2:1 Clock/Data Multiplexer / Translator with CML Outputs

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