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NB7VQ572MMNG PDF预览

NB7VQ572MMNG

更新时间: 2024-11-15 01:16:55
品牌 Logo 应用领域
安森美 - ONSEMI 逻辑集成电路
页数 文件大小 规格书
11页 176K
描述
1.8V / 2.5V /3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Translator

NB7VQ572MMNG 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:QFN包装说明:HVQCCN, LCC32,.2SQ,20
针数:32Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:4 weeks
风险等级:2.09系列:7V
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm逻辑集成电路类型:MULTIPLEXER
湿度敏感等级:1功能数量:1
输入次数:4输出次数:1
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8/3.3 VProp。Delay @ Nom-Sup:20 ns
传播延迟(tpd):0.25 ns认证状态:Not Qualified
座面最大高度:1 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mmBase Number Matches:1

NB7VQ572MMNG 数据手册

 浏览型号NB7VQ572MMNG的Datasheet PDF文件第2页浏览型号NB7VQ572MMNG的Datasheet PDF文件第3页浏览型号NB7VQ572MMNG的Datasheet PDF文件第4页浏览型号NB7VQ572MMNG的Datasheet PDF文件第5页浏览型号NB7VQ572MMNG的Datasheet PDF文件第6页浏览型号NB7VQ572MMNG的Datasheet PDF文件第7页 
NB7VQ572M  
1.8V / 2.5V /3.3V Differential  
4:1 Mux w/Input Equalizer  
to 1:2 CML Clock/Data  
Fanout / Translator  
http://onsemi.com  
MARKING  
MultiLevel Inputs w/ Internal Termination  
DIAGRAM  
Description  
1
The NB7VQ572M is a high performance differential 4:1 Clock /  
Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that  
operates up to 7 GHz / 10 Gbps respectively with a 1.8 V, 2.5 V, or  
3.3 V power supply.  
Each INx / INx input pair incorporates a fixed Equalizer Receiver,  
which when placed in series with a Data path, will enhance the  
degraded signal transmitted across an FR4 backplane or cable  
interconnect. For applications that do not require Equalization,  
consider the NB7V572M, which is pincompatible to the  
NB7VQ572M.  
The differential Clock / Data inputs have internal 50 W termination  
resistors and will accept differential LVPECL, CML, or LVDS logic  
levels. The NB7VQ572M incorporates a pair of Select pins that will  
choose one of four differential inputs and will produce two identical  
CML output copies of Clock or Data.  
As such, the NB7VQ572M is ideal for SONET, GigE, Fiber  
Channel, Backplane and other Clock/Data distribution applications.  
The two differential CML outputs will swing 400 mV when externally  
NB7V  
Q572M  
AWLYYWWG  
G
32  
1
QFN32  
MN SUFFIX  
CASE 488AM  
A
= Assembly Location  
= Wafer Lot  
WL  
YY  
WW  
G
= Year  
= Work Week  
= PbFree Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 10 of  
this data sheet.  
loaded and terminated with a 50 W resistor to V and are optimized  
CC  
for low skew and minimal jitter.  
The NB7VQ572M is offered in a low profile 5x5 mm 32pin QFN  
PbFree package. Application notes, models, and support  
documentation are available at www.onsemi.com. The NB7VQ572M  
is a member of the GigaCommfamily of high performance clock  
products.  
Features  
Input Data Rate > 10 Gb/s Typical  
Data Dependent Jitter < 10 ps  
Maximum Input Clock Frequency > 6 GHz Typical  
Random Clock Jitter < 0.8 ps RMS  
Low Skew 1:2 CML Outputs, < 15 ps max  
4:1 MultiLevel Mux Inputs, accepts LVPECL, CML,  
LVDS  
Differential CML Outputs, 400 mV PeaktoPeak,  
Typical  
Operating Range: V = 1.71 V to 3.6 V with GND =  
CC  
0 V  
Internal 50 W Input Termination Resistors  
VREFAC Reference Output  
QFN32 Package, 5mm x 5mm, PbFree  
40°C to +85°C Ambient Operating Temperature  
These are PbFree Devices  
175 ps Typical Propagation Delay  
45 ps Typical Rise and Fall Times  
© Semiconductor Components Industries, LLC, 2010  
1
Publication Order Number:  
October, 2010 Rev. P0  
NB7VQ572M/D  

NB7VQ572MMNG 替代型号

型号 品牌 替代类型 描述 数据表
NB7VQ572MMNR4G ONSEMI

完全替代

1.8V / 2.5V /3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Tr

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