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NB7VQ58M PDF预览

NB7VQ58M

更新时间: 2024-11-14 05:51:55
品牌 Logo 应用领域
安森美 - ONSEMI 转换器复用器时钟
页数 文件大小 规格书
9页 1271K
描述
1.8V / 2.5V / 3.3V Differential 2:1 Clock/Data Multiplexer / Translator with CML Outputs

NB7VQ58M 数据手册

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NB7VQ58M  
1.8V / 2.5V / 3.3V  
Differential 2:1 Clock/Data  
Multiplexer / Translator  
with CML Outputs  
http://onsemi.com  
MARKING  
w/ Selectable Input Equalizer  
DIAGRAM*  
16  
MultiLevel Inputs w/ Internal Termination  
1
Description  
NB7V  
Q58M  
ALYW G  
G
1
The NB7VQ58M is a high performance differential 2to1 Clock or  
Data multiplexer with a selectable Equalizer receiver. When placed in  
series with a Clock /Data path operating up to 7 GHz or 10.7 Gb/s,  
respectively, the NB7VQ58M inputs will compensate the degraded  
signal transmitted across an FR4 PCB backplane or cable  
interconnect. Therefore, the serial data rate is increased by reducing  
InterSymbol Interference (ISI) caused by losses in copper  
interconnect or long cables.  
The EQualizer ENable pin (EQEN) allows the INn/INn inputs to  
either flow through or bypass the Equalizer section. Control of the  
Equalizer function is realized by setting EQEN; When EQEN is set  
Low, the INn / INn inputs bypass the Equalizer. When EQEN is set  
High, the INn / INn inputs flow through the Equalizer. The default  
state at startup is LOW. As such, the NB7VQ58M is ideal for SONET,  
GigE, Fiber Channel, Backplane and other Clock/Data distribution  
applications.  
QFN16  
MN SUFFIX  
CASE 485G  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
SIMPLIFIED BLOCK DIAGRAM  
The differential inputs incorporate internal 50 W termination  
resistors that are accessed through the VT pin. This feature allows the  
NB7VQ58M to accept various logic level standards, such as LVPECL,  
CML or LVDS.  
The NB7VQ58M produces minimal Clock or Data jitter operating  
up to 7 GHz or 10.7 Gb/s, respectively.  
V
CC  
The 16 mA differential CML outputs provide matching internal  
50 W terminations and 400 mV output swings when externally  
EQ  
terminated with a 50 W resistor to V  
.
CC  
The NB7VQ58M is offered in a low profile 3mm x 3 mm 16pin  
QFN package and is a member of the GigaCommfamily of high  
performance Clock / Data products. Application notes, models, and  
support documentation are available at www.onsemi.com.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
Features  
Maximum Input Data Rate > 10.7 Gb/s  
Data Dependent Jitter < 15 ps  
Maximum Input Clock Frequency > 7 GHz  
Random Clock Jitter < 0.8 ps RMS  
Selectable Input Equalization  
Differential CML Outputs, 400 mV PeaktoPeak,  
Typical  
Operating Range: V = 1.71 V to 3.6 V with GND =  
CC  
0 V  
180 ps Typical Propagation Delay  
35 ps Typical Rise and Fall Times  
Internal 50 W Input Termination Resistors  
This is a PbFree Device  
© Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
August, 2009 Rev. 0  
NB7VQ58M/D  

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