NB2308AI3DR2

更新时间： 2024-11-24 12:58:19

品牌	Logo	应用领域
安森美 - ONSEMI		时钟
页数	文件大小	规格书
12页	161K
描述
IC 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16, SOIC-16, Clock Driver

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

NB2308AI3DR2 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	SOP, SOP16,.25	针数：	16
Reach Compliance Code：	not_compliant	HTS代码：	8542.39.00.01
风险等级：	5.08	Is Samacsys：	N
系列：	2308	输入调节：	STANDARD
JESD-30 代码：	R-PDSO-G16	JESD-609代码：	e0
长度：	9.9 mm	逻辑集成电路类型：	PLL BASED CLOCK DRIVER
最大I（ol）：	0.008 A	功能数量：	1
反相输出次数：		端子数量：	16
实输出次数：	8	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP16,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	240
电源：	3.3 V	认证状态：	Not Qualified
Same Edge Skew-Max（tskwd）：	0.2 ns	座面最大高度：	1.75 mm
子类别：	Clock Drivers	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn80Pb20)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	3.9 mm	最小 fmax：	133.3 MHz
Base Number Matches：	1

NB2308AI3DR2 数据手册

NB2308A

3.3 V Zero Delay

Clock Buffer

The NB2308A is a versatile, 3.3 V zero delay buffer designed to

distribute high−speed clocks. It is available in a 16 pin package. The

part has an on−chip PLL which locks to an input clock presented on

the REF pin. The PLL feedback is required to be driven to FBK pin,

and can be obtained from one of the outputs. The input−to−output

propagation delay is guaranteed to be less than 250 ps, and the

output−to−outputskew is guaranteed to be less than 200 ps.

The NB2308A has two banks of four outputs each, which can be

controlled by the select inputs as shown in the Select Input Decoding

Table. If all the output clocks are not required, Bank B can be

three−stated. The select input also allows the input clock to be directly

applied to the outputs for chip and system testing purposes.

Multiple NB2308A devices can accept the same input clock and

distribute it. In this case the skew between the outputs of the two

devices is guaranteed to be less than 700 ps.

http://onsemi.com

MARKING

DIAGRAMS*

XXXXXXXXXG

AWLYWW

SOIC−16

D SUFFIX

CASE 751B

The NB2308A is available in five different configurations (Refer to

NB2308A Configurations Table). The NB2308Ax1* is the base part,

where the output frequencies equal the reference if there is no counter

in the feedback path. The NB2308Ax1H is the high−drive version of

the −1 and the rise and fall times on this device are much faster.

The NB2308Ax2 allows the user to obtain 2X and 1X frequencies

on each output bank. The exact configuration and output frequencies

depends on which output drives the feedback pin. The NB2308Ax3

allows the user to obtain 4X and 2X frequencies on the outputs.

The NB2308Ax4 enables the user to obtain 2X clocks on all outputs.

Thus, the part is extremely versatile, and can be used in a variety of

applications.

XXXX

ALYWG

TSSOP−16

DT SUFFIX

CASE 948F

XXXX = Device Code

= Assembly Location

WL, L = Wafer Lot

= Year

The NB2308Ax5H is a high−drive version with REF/2 on both

banks.

WW, W = Work Week

G or G = Pb−Free Package

(Note: Microdot may be in either location)

Features

• Zero Input − Output Propagation Delay, Adjustable by Capacitive

Load on FBK Input

• Multiple Configurations − Refer to NB2308A Configurations Table

*For additional marking information, refer to

Application Note AND8002/D.

• Input Frequency Range: 15 MHz to 133 MHz

• Multiple Low−Skew Outputs

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 9 of this data sheet.

• Output−Output Skew Less than 200 ps

• Device−Device Skew Less than 700 ps

• Two banks of four outputs, three−stateable by two select inputs

• Less than 200 ps Cycle−to−Cycle Jitter

• Available in 16−pin SOIC and TSSOP Packages

• 3.3V operation

• Advanced 0.35 ꢀ CMOS Technology

• These are Pb−Free Devices**

*x = C for Commercial; I for Industrial.

**For additional information on our Pb−Free strategy and soldering details,

please download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Publication Order Number:

November, 2006 − Rev. 3

NB2308A/D

12 3 4 5 6 7...12

中文翻译

下载PDF

与NB2308AI3DR2相关器件

型号	品牌	获取价格	描述	数据表
NB2308AI3DR2G	ONSEMI	获取价格	3.3 V Zero Delay Clock Buffer
NB2308AI3DR2G	ROCHESTER	获取价格	2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16, LEAD
NB2308AI3DT	ONSEMI	获取价格	2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16, TSSOP
NB2308AI3DTG	ONSEMI	获取价格	3.3 V Zero Delay Clock Buffer
NB2308AI3DTR2	ONSEMI	获取价格	2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16, TSSOP
NB2308AI3DTR2G	ONSEMI	获取价格	3.3 V Zero Delay Clock Buffer
NB2308AI4	ONSEMI	获取价格	3.3 V Zero Delay Clock Buffer
NB2308AI4DG	ONSEMI	获取价格	3.3 V Zero Delay Clock Buffer
NB2308AI4DR2G	ROCHESTER	获取价格	2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16, LEAD
NB2308AI4DR2G	ONSEMI	获取价格	3.3 V Zero Delay Clock Buffer

与NB2308AI3DR2相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

38
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

30
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

58
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

54

产品中心

服务支持

精选活动

关于我们

帮助中心

NB2308AI3DR2

NB2308AI3DR2 技术参数

NB2308AI3DR2 数据手册

与NB2308AI3DR2相关器件

与NB2308AI3DR2相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

NB2308AI3DR2

NB2308AI3DR2 技术参数

NB2308AI3DR2 数据手册

与NB2308AI3DR2相关器件

与NB2308AI3DR2相关文章

您还可以找

您在本页遇到什么问题？