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NB100ELT23LDT PDF预览

NB100ELT23LDT

更新时间: 2024-02-06 02:49:10
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器接口集成电路光电二极管
页数 文件大小 规格书
6页 66K
描述
3.3V Dual Differential LVPECL/LVDS to LVTTL Translator

NB100ELT23LDT 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOIC包装说明:TSSOP, TSSOP8,.19
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:4 weeks风险等级:1.37
Samacsys Confidence:3Samacsys Status:Released
Samacsys PartID:225914Samacsys Pin Count:8
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Small Outline Packages
Samacsys Footprint Name:TSSOP-8 CASE948R-02 ISSUE ASamacsys Released Date:2015-08-14 09:07:23
Is Samacsys:N最大延迟:3.25 ns
接口集成电路类型:PECL TO TTL TRANSLATORJESD-30 代码:S-PDSO-G8
JESD-609代码:e3长度:3 mm
湿度敏感等级:3位数:1
功能数量:2端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出锁存器或寄存器:NONE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.19封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Level Translators
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3 mm
Base Number Matches:1

NB100ELT23LDT 数据手册

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NB100ELT23L  
3.3VꢀDual Differential  
LVPECL/LVDS to LVTTL  
Translator  
The NB100ELT23L is a dual differential LVPECL/LVDS to LVTTL  
translator. Because LVPECL (Positive ECL) or LVDS levels are used,  
only +3.3 V and ground are required. The small outline 8-lead package  
and the dual gate design of the ELT23L makes it ideal for applications  
which require the translation of a clock and a data signal.  
http://onsemi.com  
MARKING  
DIAGRAMS*  
The ELT23L is available in only the ECL 100K standard. Since  
there are no LVPECL outputs or an external V  
ELT23L does not require both ECL standard versions. The LVPECL  
inputs are differential. Therefore, the NB100ELT23L can accept any  
standard differential LVPECL/LVDS input referenced from a V of  
+3.3 V.  
reference, the  
BB  
8
KT23L  
ALYW  
SO−8  
D SUFFIX  
CASE 751  
8
CC  
1
1
1
8
2.1 ns Typical Propagation Delay  
Maximum Operating Frequency > 160 MHz  
24 mA LVTTL Outputs  
TSSOP−8  
DT SUFFIX  
CASE 948R  
K23L  
ALYW  
8
Operating Range: V = 3.0 V to 3.6 V with GND = 0 V  
1
CC  
Q Output Will Default LOW with Inputs Open or at GND  
Pb−Free Packages are Available*  
A = Assembly Location  
L = Wafer Lot  
Y = Year  
W = Work Week  
*For additional information, see Application Note  
AND8002/D  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
February, 2005 − Rev. 4  
NB100ELT23L/D  

NB100ELT23LDT 替代型号

型号 品牌 替代类型 描述 数据表
NB100ELT23LDTR2G ONSEMI

完全替代

3.3V Dual Differential LVPECL/LVDS to LVTTL Translator
NB100ELT23LDTR2 ONSEMI

完全替代

3.3V Dual Differential LVPECL/LVDS to LVTTL Translator
NB100ELT23LDTG ONSEMI

完全替代

3.3V Dual Differential LVPECL/LVDS to LVTTL Translator

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