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NB100LVEP221FAG

更新时间： 2024-09-25 03:47:03
品牌 Logo 应用领域
安森美 - ONSEMI 时钟驱动器
页数 文件大小 规格书
11页 165K
描述
2.5V/3.3V 1:20 Differential HSTL/ECL/PECL Clock Driver

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中文翻译

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NB100LVEP221FAG 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFP
包装说明：HLQFP, QFP52,.47SQ针数：52
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.65
其他特性：NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.8V系列：100LVE
输入调节：DIFFERENTIAL MUXJESD-30 代码：S-PQFP-G52
JESD-609代码：e3长度：10 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER湿度敏感等级：3
功能数量：1反相输出次数：
端子数量：52实输出次数：20
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HLQFP
封装等效代码：QFP52,.47SQ封装形状：SQUARE
封装形式：FLATPACK, HEAT SINK/SLUG, LOW PROFILE峰值回流温度（摄氏度）：260
电源：-2.5/-3.3/2.5/3.3 V传播延迟（tpd）：0.71 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.05 ns
座面最大高度：1.7 mm子类别：Clock Drivers
最大供电电压 (Vsup)：3.8 V最小供电电压 (Vsup)：2.375 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：ECL温度等级：INDUSTRIAL
端子面层：Tin (Sn)端子形式：GULL WING
端子节距：0.65 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：10 mm
Base Number Matches：1

NB100LVEP221FAG 数据手册

 浏览型号NB100LVEP221FAG的Datasheet PDF文件第2页浏览型号NB100LVEP221FAG的Datasheet PDF文件第3页浏览型号NB100LVEP221FAG的Datasheet PDF文件第4页浏览型号NB100LVEP221FAG的Datasheet PDF文件第5页浏览型号NB100LVEP221FAG的Datasheet PDF文件第6页浏览型号NB100LVEP221FAG的Datasheet PDF文件第7页 
NB100LVEP221  
2.5V/3.3Vꢀ1:20 Differential  
HSTL/ECL/PECL Clock Driver  
Description  
The NB100LVEP221 is a low skew 1−to−20 differential clock  
driver, designed with clock distribution in mind, accepting two clock  
sources into an input multiplexer. The two clock inputs are differential  
ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The  
LVPECL input signals can be either differential configuration or  
http://onsemi.com  
MARKING  
DIAGRAM*  
single−ended (if the V output is used).  
BB  
The LVEP221 specifically guarantees low output−to−output skew.  
Optimal design, layout, and processing minimize skew within a device  
and from device to device.  
To ensure tightest skew, both sides of differential outputs should be  
terminated identically into 50 W even if only one output is being used.  
If an output pair is unused, both outputs may be left open  
(unterminated) without affecting skew.  
NB100  
LVEP221  
AWLYYWWG  
LQFP−52  
FA SUFFIX  
CASE 848H  
52  
1
The NB100LVEP221, as with most other ECL devices, can be  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
operated from a positive V supply in LVPECL mode. This allows the  
CC  
WL  
YY  
WW  
G
LVEP221 to be used for high performance clock distribution in +3.3 V or  
+2.5 V systems. In a PECL environment, series or Thevenin line  
terminations are typically used as they require no additional power  
supplies. For more information on PECL terminations, designers should  
refer to Application Note AND8020/D.  
*For additional marking information, refer to  
Application Note AND8002/D.  
The V pin, an internally generated voltage supply, is available to this  
BB  
device only. For single−ended LVPECL input conditions, the unused  
differential input is connected to V as a switching reference voltage.  
BB  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 9 of this data sheet.  
V
V
may also rebias AC coupled inputs. When used, decouple V and  
via a 0.01 mF capacitor and limit current sourcing or sinking to  
BB  
BB  
CC  
0.5 mA. When not used, V should be left open.  
BB  
Single−ended CLK input operation is limited to a V ≥ 3.0 V in  
CC  
LVPECL mode, or V ≤ −3.0 V in NECL mode.  
EE  
Features  
• 15 ps Typical Output−to−Output Skew  
• 40 ps Typical Device−to−Device Skew  
• Jitter Less than 2 ps RMS  
• Maximum Frequency > 1.0 GHz Typical  
• Thermally Enhanced 52−Lead LQFP  
• V Output  
BB  
• 540 ps Typical Propagation Delay  
• LVPECL and HSTL Mode Operating Range:  
V
CC  
= 2.375 V to 3.8 V with V = 0 V  
EE  
• NECL Mode Operating Range:  
= 0 V with V = −2.375 V to −3.8 V  
V
CC  
EE  
• Q Output will Default Low with Inputs Open or at V  
• Pin Compatible with Motorola MC100EP221  
• Pb−Free Packages are Available*  
EE  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 7  
NB100LVEP221/D  
1234567...11

中文翻译

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NB100LVEP221FAG 替代型号

型号 品牌 替代类型 描述 数据表
NB100LVEP221FARG ONSEMI

完全替代

 2.5V/3.3V 1:20 Differential HSTL/ECL/PECL Clock Driver
NB100LVEP221FAR2 ONSEMI

类似代替

 2.5V/3.3V 1:20 Differential HSTL/ECL/PECL Clock Driver
NB100LVEP221FA ONSEMI

功能相似

 2.5V/3.3V 1:20 Differential HSTL/ECL/PECL Clock Driver

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NB100LVEP221FARG ONSEMI

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 		2.5V/3.3V 1:20 Differential HSTL/ECL/PECL Clock Driver
NB100LVEP221MNG ONSEMI

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NB100LVEP221MNR2G ONSEMI

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NB100LVEP221MNRG ONSEMI

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 		时钟/数据扇出缓冲器，2:1:20 差分，HSTL / ECL / PECL，2.5 V
NB100LVEP222 ONSEMI

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 		2.5 V/3.3 V 1:15 Differential ECL/PECL ±1/±2
NB100LVEP222/D ETC

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 		2.5V/3.3V 1:15 Differential ECL/PECL w/1 and w/2 Clock Driver
NB100LVEP222_15 ONSEMI

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 		Differential ECL/PECL Clock Driver
NB100LVEP222FA ONSEMI

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 		2.5 V/3.3 V 1:15 Differential ECL/PECL ±1/±2
NB100LVEP222FAG ONSEMI

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 		2.5 V/3.3 V 1:15 Differential ECL/PECL ±1/±2

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