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NB100LVEP221MNR2G PDF预览

NB100LVEP221MNR2G

更新时间： 2024-11-12 21:09:23
品牌 Logo 应用领域
安森美 - ONSEMI 驱动输出元件逻辑集成电路
页数 文件大小 规格书
12页 166K
描述
100LVE SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC52, 8 X 8 MM, LEAD FREE, QFN-52

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NB100LVEP221MNR2G 技术参数

是否Rohs认证： 符合生命周期：Active
零件包装代码：QFN包装说明：HVQCCN, LCC52,.31SQ,20
针数：52Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.41
其他特性：NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.8V系列：100LVE
输入调节：DIFFERENTIAL MUXJESD-30 代码：S-XQCC-N52
长度：8 mm逻辑集成电路类型：LOW SKEW CLOCK DRIVER
功能数量：1反相输出次数：
端子数量：52实输出次数：20
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC52,.31SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE电源：-2.5/-3.3/2.5/3.3 V
Prop。Delay @ Nom-Sup：0.8 ns传播延迟（tpd）：0.71 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.05 ns
座面最大高度：1 mm子类别：Clock Drivers
最大供电电压 (Vsup)：3.8 V最小供电电压 (Vsup)：2.375 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：ECL温度等级：INDUSTRIAL
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD宽度：8 mm
Base Number Matches：1

NB100LVEP221MNR2G 数据手册

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NB100LVEP221  
2.5V/3.3Vꢀ1:20 Differential  
HSTL/ECL/PECL Clock Driver  
Description  
The NB100LVEP221 is a low skew 1-to-20 differential clock  
driver, designed with clock distribution in mind, accepting two clock  
sources into an input multiplexer. The two clock inputs are differential  
ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The  
LVPECL input signals can be either differential configuration or  
http://onsemi.com  
MARKING  
DIAGRAM*  
52  
single-ended (if the V output is used).  
BB  
1
The LVEP221 specifically guarantees low output-to-output skew.  
Optimal design, layout, and processing minimize skew within a device  
and from device to device.  
NB100  
LVEP221  
AWLYYWWG  
To ensure tightest skew, both sides of differential outputs should be  
terminated identically into 50 W even if only one output is being used.  
If an output pair is unused, both outputs may be left open  
(unterminated) without affecting skew.  
LQFP-52  
FA SUFFIX  
CASE 848H  
The NB100LVEP221, as with most other ECL devices, can be  
operated from a positive V supply in LVPECL mode. This allows the  
52  
CC  
1
LVEP221 to be used for high performance clock distribution in +3.3 V or  
+2.5 V systems. In a PECL environment, series or Thevenin line  
terminations are typically used as they require no additional power  
supplies. For more information on PECL terminations, designers should  
refer to Application Note AND8020/D.  
NB100  
LVEP221  
AWLYYWWG  
1
52  
QFN-52  
MN SUFFIX  
CASE 485M  
The V pin, an internally generated voltage supply, is available to this  
BB  
device only. For single- ended LVPECL input conditions, the unused  
differential input is connected to V as a switching reference voltage.  
BB  
may also rebias AC coupled inputs. When used, decouple V and  
A
= Assembly Location  
= Wafer Lot  
= Year  
V
BB  
V
CC  
BB  
via a 0.01 mF capacitor and limit current sourcing or sinking to  
WL  
YY  
WW  
G
0.5ꢀmA. When not used, V should be left open.  
BB  
= Work Week  
= Pb-Free Package  
Single- ended CLK input operation is limited to a V ≥ 3.0 V in  
CC  
LVPECL mode, or V ≤ -3.0 V in NECL mode.  
EE  
*For additional marking information, refer to  
Application Note AND8002/D.  
Features  
•ꢁ15 ps Typical Output-to-Output Skew  
•ꢁ40 ps Typical Device-to- Device Skew  
•ꢁJitter Less than 2 ps RMS  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 10 of this data sheet.  
•ꢁMaximum Frequency > 1.0 GHz Typical  
•ꢁThermally Enhanced 52-Lead LQFP and QFN  
•ꢁV Output  
BB  
•ꢁ540 ps Typical Propagation Delay  
•ꢁLVPECL and HSTL Mode Operating Range:  
CC  
V
= 2.375 V to 3.8 V with V = 0 V  
EE  
•ꢁNECL Mode Operating Range:  
= 0 V with V = -2.375 V to -3.8 V  
V
CC  
EE  
•ꢁQ Output will Default Low with Inputs Open or at V  
•ꢁPin Compatible with Motorola MC100EP221  
•ꢁPb-Free Packages are Available*  
EE  
*For additional information on our Pb-Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©ꢀ Semiconductor Components Industries, LLC, 2007  
June, 2007 - Rev. 8  
1
Publication Order Number:  
NB100LVEP221/D  
1234567...12

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与NB100LVEP221MNR2G相关器件

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NB100LVEP221MNRG ONSEMI

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 		时钟/数据扇出缓冲器，2:1:20 差分，HSTL / ECL / PECL，2.5 V
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 		2.5 V/3.3 V 1:15 Differential ECL/PECL ±1/±2
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NB100LVEP222FA ONSEMI

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 		2.5 V/3.3 V 1:15 Differential ECL/PECL ±1/±2
NB100LVEP222FAG ONSEMI

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 		2.5 V/3.3 V 1:15 Differential ECL/PECL ±1/±2
NB100LVEP222FAR2 ONSEMI

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 		2.5 V/3.3 V 1:15 Differential ECL/PECL ±1/±2
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 		2.5 V/3.3 V 1:15 Differential ECL/PECL ±1/±2
NB100LVEP222MNG ONSEMI

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 		暂无描述
NB100LVEP222MNR2G ONSEMI

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 		Differential ECL/PECL Clock Driver

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