NB100LVEP221
2.5V/3.3Vꢀ1:20 Differential
HSTL/ECL/PECL Clock Driver
The NB100LVEP221 is a low skew 1-to-20 differential clock
driver, designed with clock distribution in mind, accepting two clock
sources into an input multiplexer. The two clock inputs are differential
ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The
LVPECL input signals can be either differential configuration or
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MARKING
single-ended (if the V output is used).
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The LVEP221 specifically guarantees low output-to-output skew.
Optimal design, layout, and processing minimize skew within a device
and from device to device.
DIAGRAM*
To ensure tightest skew, both sides of differential outputs should be
terminated identically into 50 W even if only one output is being used.
If an output pair is unused, both outputs may be left open
(unterminated) without affecting skew.
NB100
LVEP221
AWLYYWW
52
52-LEAD LQFP
THERMALLY ENHANCED
CASE 848H
The NB100LVEP221, as with most other ECL devices, can be
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operated from a positive V supply in LVPECL mode. This allows the
CC
FA SUFFIX
LVEP221 to be used for high performance clock distribution in +3.3 V or
+2.5 V systems. In a PECL environment, series or Thevenin line
terminations are typically used as they require no additional power
supplies. For more information on PECL terminations, designers should
refer to Application Note AND8020/D.
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
The V pin, an internally generated voltage supply, is available to this
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device only. For single- ended LVPECL input conditions, the unused
*For additional information, refer to Application Note
AND8002/D
differential input is connected to V as a switching reference voltage.
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V
V
may also rebias AC coupled inputs. When used, decouple V and
via a 0.01 mF capacitor and limit current sourcing or sinking to
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CC
0.5 mA. When not used, V should be left open.
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ORDERING INFORMATION
Single- ended CLK input operation is limited to a V ≥ 3.0 V in
CC
LVPECL mode, or V ≤ -3.0 V in NECL mode.
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Device
Package
Shipping
• 15 ps Typical Output-to-Output Skew
• 40 ps Typical Device-to- Device Skew
• Jitter Less than 2 ps RMS
NB100LVEP221FA
LQFP-52 160 Units/Tray
NB100LVEP221FAR2 LQFP-52 1500/Tape & Reel
• Maximum Frequency > 1.0 GHz Typical
• Thermally Enhanced 52-Lead LQFP
• V Output
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• 540 ps Typical Propagation Delay
• LVPECL and HSTL Mode Operating Range:
V
CC
= 2.375 V to 3.8 V with V = 0 V
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• NECL Mode Operating Range:
= 0 V with V = -2.375 V to -3.8 V
V
CC
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• Q Output will Default Low with Inputs Open or at V
• Pin Compatible with Motorola MC100EP221
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Semiconductor Components Industries, LLC, 2003
1
Publication Order Number:
January, 2003 - Rev. 4
NB100LVEP221/D