Datasheet > NAND08GR4B2CZC6F

NAND08GR4B2CZC6F

更新时间： 2024-10-27 13:43:19

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
59页	1154K
描述
Flash, 512MX16, 35ns, PBGA63, 9.50 X 12 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, LFBGA-63

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数据手册

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NAND08GR4B2CZC6F 数据手册

NAND512-B, NAND01G-B NAND02G-B

NAND04G-B NAND08G-B

512 Mbit, 1 Gbit, 2 Gbit, 4 Gbit, 8 Gbit

2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory

PRELIMINARY DATA

FEATURES SUMMARY

■

HIGH DENSITY NAND FLASH MEMORIES

Figure 1. Packages

–

Up to 8 Gbit memory array

Up to 64Mbit spare area

Cost effective solutions for mass storage

applications

■

NAND INTERFACE

–

x8 or x16 bus width

Multiplexed Address/ Data

Pinout compatibility for all densities

TSOP48 12 x 20mm

■

SUPPLY VOLTAGE

–

1.8V device: V_DD= 1.7 to 1.95V

3.0V device: V_DD= 2.7 to 3.6V

PAGE SIZE

USOP48 12 x 17 x 0.65mm

–

x8 device: (2048 + 64 spare) Bytes

x16 device: (1024 + 32 spare) Words

BLOCK SIZE

FBGA

–

x8 device: (128K + 4K spare) Bytes

x16 device: (64K + 2K spare) Words

PAGE READ / PROGRAM

VFBGA63 9.5 x 12 x 1mm

TFBGA63 9.5 x 12 x 1.2mm

LFBGA63 9.5 x 12 x 1.4mm

–

Random access: 25µs (max)

Sequential access: 50ns (min)

Page program time: 300µs (typ)

■

DATA PROTECTION

■

COPY BACK PROGRAM MODE

Fast page copy without external buffering

–

Hardware and Software Block Locking

Hardware Program/Erase locked during

Power transitions

–

CACHE PROGRAM AND CACHE READ

MODES

DATA INTEGRITY

–

Internal Cache Register to improve the

program and read throughputs

–

100,000 Program/Erase cycles

10 years Data Retention

RoHS COMPLIANCE

Lead-Free Components are Compliant

with the RoHS Directive

DEVELOPMENT TOOLS

■

FAST BLOCK ERASE

Block erase time: 2ms (typ)

■

–

■

STATUS REGISTER

ELECTRONIC SIGNATURE

CHIP ENABLE ‘DON’T CARE’

–

Error Correction Code software and

hardware models

Bad Blocks Management and Wear

Leveling algorithms

PC Demo board with simulation software

File System OS Native reference software

Hardware simulation models

–

for simple interface with microcontroller

AUTOMATIC PAGE 0 READ AT POWER-UP

Boot from NAND support

SERIAL NUMBER OPTION

■

–

February 2005

1/59

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

12 3 4 5 6 7...59

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与NAND08GR4B2CZC6F相关器件

型号	品牌	获取价格	描述	数据表
NAND08GR4B2CZL1E	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash
NAND08GR4B2CZL1F	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash
NAND08GR4B2CZL6E	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash
NAND08GR4B2CZL6F	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash
NAND08GR4B2DN1E	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash
NAND08GR4B2DN1F	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash
NAND08GR4B2DN6E	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash
NAND08GR4B2DN6F	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash
NAND08GR4B2DZL1E	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash
NAND08GR4B2DZL1F	NUMONYX	获取价格	4 Gbit, 8 Gbit, 2112 byte/1056 word page multiplane architecture, 1.8 V or 3 V, NAND Flash

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