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NAND01GW3B2BV1T PDF预览

NAND01GW3B2BV1T

更新时间: 2024-01-07 20:02:40
品牌 Logo 应用领域
恒忆 - NUMONYX 光电二极管内存集成电路
页数 文件大小 规格书
58页 943K
描述
Flash, 128MX8, 25000ns, PDSO48, 12 X 17 MM, 0.65 MM HEIGHT, PLASTIC, USOP-48

NAND01GW3B2BV1T 技术参数

是否Rohs认证:不符合生命周期:Transferred
零件包装代码:SOIC包装说明:12 X 17 MM, 0.65 MM HEIGHT, PLASTIC, USOP-48
针数:48Reach Compliance Code:compliant
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.26Is Samacsys:N
最长访问时间:25000 nsJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:15.4 mm
内存密度:1073741824 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
端子数量:48字数:134217728 words
字数代码:128000000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128MX8封装主体材料:PLASTIC/EPOXY
封装代码:VSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED编程电压:3 V
认证状态:Not Qualified座面最大高度:0.65 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED类型:NAND TYPE
宽度:12 mmBase Number Matches:1

NAND01GW3B2BV1T 数据手册

 浏览型号NAND01GW3B2BV1T的Datasheet PDF文件第4页浏览型号NAND01GW3B2BV1T的Datasheet PDF文件第5页浏览型号NAND01GW3B2BV1T的Datasheet PDF文件第6页浏览型号NAND01GW3B2BV1T的Datasheet PDF文件第8页浏览型号NAND01GW3B2BV1T的Datasheet PDF文件第9页浏览型号NAND01GW3B2BV1T的Datasheet PDF文件第10页 
NAND512-B, NAND01G-B, NAND02G-B, NAND04G-B, NAND08G-B  
SUMMARY DESCRIPTION  
The NAND Flash 2112 Byte/ 1056 Word Page is a  
family of non-volatile Flash memories that uses  
NAND cell technology. The devices range from  
512 Mbits to 8 Gbits and operate with either a 1.8V  
or 3V voltage supply. The size of a Page is either  
2112 Bytes (2048 + 64 spare) or 1056 Words  
(1024 + 32 spare) depending on whether the de-  
vice has a x8 or x16 bus width.  
The address lines are multiplexed with the Data In-  
put/Output signals on a multiplexed x8 or x16 In-  
put/Output bus. This interface reduces the pin  
count and makes it possible to migrate to other  
densities without changing the footprint.  
throughputs for large files. During Cache Program-  
ming, the device loads the data in a Cache Regis-  
ter while the previous data is transferred to the  
Page Buffer and programmed into the memory ar-  
ray. During Cache Reading, the device loads the  
data in a Cache Register while the previous data  
is transferred to the I/O Buffers to be read.  
All devices have the Chip Enable Don’t Care fea-  
ture, which allows code to be directly downloaded  
by a microcontroller, as Chip Enable transitions  
during the latency time do not stop the read oper-  
ation.  
All devices have the option of a Unique Identifier  
(serial number), which allows each device to be  
uniquely identified.  
The Unique Identifier options is subject to an NDA  
(Non Disclosure Agreement) and so not described  
in the datasheet. For more details of this option  
contact your nearest ST Sales office.  
Each block can be programmed and erased over  
100,000 cycles. To extend the lifetime of NAND  
Flash devices it is strongly recommended to imple-  
ment an Error Correction Code (ECC).  
The devices have hardware and software security  
features:  
A Write Protect pin is available to give a  
hardware protection against program and  
erase operations.  
A Block Locking scheme is available to  
provide user code and/or data protection.  
The devices are available in the following packag-  
es:  
TSOP48 (12 x 20mm) for all products  
USOP48 (12 x 17 x 0.65mm) for 512Mb  
and1Gb products  
The devices feature an open-drain Ready/Busy  
output that can be used to identify if the Program/  
Erase/Read (P/E/R) Controller is currently active.  
The use of an open-drain output allows the Ready/  
Busy pins from several memories to be connected  
to a single pull-up resistor.  
A Copy Back Program command is available to  
optimize the management of defective blocks.  
When a Page Program operation fails, the data  
can be programmed in another page without hav-  
ing to resend the data to be programmed.  
VFBGA63 (9.5 x 12 x 1mm, 0.8mm pitch) for  
512Mb and 1Gb products  
TFBGA63 (9.5 x 12 x 1.2mm, 0.8mm pitch) for  
2Gb Dual Die products  
For information on how to order these options refer  
to Table 29., Ordering Information Scheme. De-  
vices are shipped from the factory with Block 0 al-  
ways valid and the memory content bits, in valid  
blocks, erased to ’1’.  
See Table 2., Product Description, for all the de-  
vices available in the family.  
Each device has Cache Program and Cache Read  
features which improve the program and read  
7/58  

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Flash, 128MX8, 25000ns, PDSO48, 12 X 17 MM, 0.65 MM HEIGHT, ROHS COMPLIANT, PLASTIC, USOP-
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NAND01GW3B2BZA1 STMICROELECTRONICS

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1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
NAND01GW3B2BZA1E STMICROELECTRONICS

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1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
NAND01GW3B2BZA1E NUMONYX

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1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory
NAND01GW3B2BZA1F STMICROELECTRONICS

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1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
NAND01GW3B2BZA1F NUMONYX

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1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory
NAND01GW3B2BZA1T NUMONYX

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Flash, 128MX8, 35ns, PBGA63, 9.50 X 12 MM, 1 MM HEIGHT, 0.80 MM PITCH, VFBGA-63