NAND512-B, NAND01G-B, NAND02G-B,
NAND04G-B, NAND08G-B
512 Mbit, 1 Gbit, 2 Gbit, 4 Gbit, 8 Gbit
2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
PRELIMINARY DATA
FEATURES SUMMARY
■
HIGH DENSITY NAND FLASH MEMORIES
Figure 1. Packages
–
–
–
Up to 8 Gbit memory array
Up to 64Mbit spare area
Cost effective solutions for mass storage
applications
■
NAND INTERFACE
–
–
–
x8 or x16 bus width
Multiplexed Address/ Data
Pinout compatibility for all densities
TSOP48 12 x 20mm
■
■
■
■
SUPPLY VOLTAGE
–
–
1.8V device: V = 1.7 to 1.95V
DD
3.0V device: V = 2.7 to 3.6V
DD
PAGE SIZE
USOP48 12 x 17 x 0.65mm
–
–
x8 device: (2048 + 64 spare) Bytes
x16 device: (1024 + 32 spare) Words
BLOCK SIZE
FBGA
–
–
x8 device: (128K + 4K spare) Bytes
x16 device: (64K + 2K spare) Words
PAGE READ / PROGRAM
VFBGA63 9.5 x 12 x 1mm
TFBGA63 9.5 x 12 x 1.2mm
–
–
–
Random access: 25µs (max)
Sequential access: 50ns (min)
Page program time: 300µs (typ)
■
■
DATA PROTECTION
■
■
COPY BACK PROGRAM MODE
Fast page copy without external buffering
–
–
Hardware and Software Block Locking
Hardware Program/Erase locked during
Power transitions
–
CACHE PROGRAM AND CACHE READ
MODES
DATA INTEGRITY
–
Internal Cache Register to improve the
program and read throughputs
–
–
100,000 Program/Erase cycles
10 years Data Retention
RoHS COMPLIANCE
Lead-Free Components are Compliant
with the RoHS Directive
DEVELOPMENT TOOLS
■
FAST BLOCK ERASE
Block erase time: 2ms (typ)
■
■
–
–
■
■
■
STATUS REGISTER
ELECTRONIC SIGNATURE
CHIP ENABLE ‘DON’T CARE’
–
Error Correction Code software and
hardware models
–
for simple interface with microcontroller
■
SERIAL NUMBER OPTION
–
Bad Blocks Management and Wear
Leveling algorithms
–
–
–
PC Demo board with simulation software
File System OS Native reference software
Hardware simulation models
August 2005
1/58
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.