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MX26LV800ATXBC-70G PDF预览

MX26LV800ATXBC-70G

更新时间: 2024-11-23 04:38:35
品牌 Logo 应用领域
旺宏电子 - Macronix /
页数 文件大小 规格书
50页 559K
描述
8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY HIGH SPEED eLiteFlashTM MEMORY

MX26LV800ATXBC-70G 数据手册

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MX26LV800AT/AB  
Macronix NBitTM Memory Family  
8M-BIT[1Mx8/512Kx16]CMOSSINGLEVOLTAGE  
3V ONLY HIGH SPEED eLiteFlashTM MEMORY  
FEATURES  
• Extended single - supply voltage range 3.0V to 3.6V  
• 1,048,576 x 8/524,288 x 16 switchable  
• Singlepowersupplyoperation  
anderaseoperationcompletion  
• Ready/Busy# pin (RY/BY#)  
-Providesahardwaremethodofdetectingprogramor  
- 3.0V only operation for read, erase and program  
operation  
eraseoperationcompletion  
• CFI (Common Flash Interface) compliant  
- Flash device parameters stored on the device and  
provide the host system to access  
• Fast access time: 55/70ns  
• Lowpowerconsumption  
• 2,000 minimum erase/program cycles  
• Latch-up protected to 100mA from -1V to VCC+1V  
• Boot Sector Architecture  
- T = Top Boot Sector  
- 30mA maximum active current  
- 30uA typical standby current  
• Commandregisterarchitecture  
- Byte/word Programming (55us/70us typical)  
- Sector Erase (Sector structure 16K-Bytex1,  
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)  
• Auto Erase (chip & sector) and Auto Program  
-Automaticallyeraseanycombinationofsectorswith  
Erase verify capability.  
- B = Bottom Boot Sector  
• Package type:  
- 48-pin TSOP  
- 48-ball CSP  
• Compatibility with JEDEC standard  
- Pinout and software compatible with single-power  
supply Flash  
- Automatically program and verify data at specified  
address  
• 20 years data retention  
• Status Reply  
- Data# polling & Toggle bit for detection of program  
GENERAL DESCRIPTION  
The MX26LV800AT/AB is a 8-mega bit high speed Flash  
memory organized as 1M bytes of 8 bits or 512K words  
of 16 bits. MXIC's high speed Flash memories offer the  
most cost-effective and reliable read/write non-volatile  
random access memory. The MX26LV800AT/AB is pack-  
aged in 48-pinTSOP, and 48-ball CSP. It is designed to  
be reprogrammed and erased in system or in standard  
EPROM programmers.  
lows for 100% TTL level control inputs and fixed power  
supply levels during erase and programming, while main-  
taining maximum EPROM compatibility.  
MXIC high speed Flash technology reliably stores  
memory contents even after 2,000 erase and program  
cycles. The MXIC cell is designed to optimize the erase  
and programming mechanisms. In addition, the combi-  
nation of advanced tunnel oxide processing and low in-  
ternal electric fields for erase and program operations  
produces reliable cycling. The MX26LV800AT/AB uses  
a 3.0V~3.6VVCC supply to perform the High Reliability  
Erase and auto Program/Erase algorithms.  
The standard MX26LV800AT/AB offers access time as  
fast as 55ns, allowing operation of high-speed micropro-  
cessors without wait states. To eliminate bus conten-  
tion, the MX26LV800AT/AB has separate chip enable  
(CE#) and output enable (OE#) controls.  
The highest degree of latch-up protection is achieved  
with MXIC's proprietary non-epi process. Latch-up pro-  
tection is proved for stresses up to 100 milliamperes on  
address and data pin from -1V to VCC + 1V.  
MXIC's high speed Flash memories augment EPROM  
functionality with in-circuit electrical erasure and program-  
ming. The MX26LV800AT/AB uses a command register  
to manage this functionality. The command register al-  
P/N:PM1128  
REV. 1.1, MAR. 28, 2005  
1

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