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MX26LV800TTC-55 PDF预览

MX26LV800TTC-55

更新时间: 2024-11-23 04:38:35
品牌 Logo 应用领域
旺宏电子 - Macronix 闪存存储内存集成电路光电二极管
页数 文件大小 规格书
48页 553K
描述
8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY HIGH SPEED eLiteFlashTM MEMORY

MX26LV800TTC-55 数据手册

 浏览型号MX26LV800TTC-55的Datasheet PDF文件第2页浏览型号MX26LV800TTC-55的Datasheet PDF文件第3页浏览型号MX26LV800TTC-55的Datasheet PDF文件第4页浏览型号MX26LV800TTC-55的Datasheet PDF文件第5页浏览型号MX26LV800TTC-55的Datasheet PDF文件第6页浏览型号MX26LV800TTC-55的Datasheet PDF文件第7页 
MX26LV800T/B  
Macronix NBitTM Memory Family  
8M-BIT[1Mx8/512Kx16]CMOSSINGLEVOLTAGE  
3V ONLY HIGH SPEED eLiteFlashTM MEMORY  
FEATURES  
• Extended single - supply voltage range 3.0V to 3.6V  
• 1,048,576 x 8/524,288 x 16 switchable  
• Singlepowersupplyoperation  
• Status Reply  
- Data# polling & Toggle bit for detection of program  
anderaseoperationcompletion.  
• Ready/Busy# pin (RY/BY#)  
-Providesahardwaremethodofdetectingprogramor  
eraseoperationcompletion.  
- 3.0V only operation for read, erase and program  
operation  
• Fast access time: 55/70ns  
• Lowpowerconsumption  
• 2,000 minimum erase/program cycles  
• Latch-up protected to 100mA from -1V to VCC+1V  
• Boot Sector Architecture  
- 30mA maximum active current  
- 30uA typical standby current  
• Commandregisterarchitecture  
- Byte/word Programming (55us/70us typical)  
- Sector Erase (Sector structure 16K-Bytex1,  
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)  
• Auto Erase (chip & sector) and Auto Program  
-Automaticallyeraseanycombinationofsectorswith  
Erase verify capability.  
- T = Top Boot Sector  
- B = Bottom Boot Sector  
• Package type:  
- 48-pin TSOP  
- 48-ball CSP  
• Compatibility with JEDEC standard  
- Pinout and software compatible with single-power  
supply Flash  
- Automatically program and verify data at specified  
address  
• 20 years data retention  
GENERAL DESCRIPTION  
The MX26LV800T/B is a 8-mega bit high speed Flash  
memory organized as 1M bytes of 8 bits or 512K words  
of 16 bits. MXIC's high speed Flash memories offer the  
most cost-effective and reliable read/write non-volatile  
random access memory. The MX26LV800T/B is pack-  
aged in 48-pinTSOP, and 48-ball CSP. It is designed to  
be reprogrammed and erased in system or in standard  
EPROM programmers.  
for 100% TTL level control inputs and fixed power sup-  
ply levels during erase and programming, while main-  
taining maximum EPROM compatibility.  
MXIC high speed Flash technology reliably stores  
memory contents even after 2,000 erase and program  
cycles. The MXIC cell is designed to optimize the erase  
and programming mechanisms. In addition, the combi-  
nation of advanced tunnel oxide processing and low in-  
ternal electric fields for erase and program operations  
produces reliable cycling. The MX26LV800T/B uses a  
3.0V~3.6V VCC supply to perform the High Reliability  
Erase and auto Program/Erase algorithms.  
The standard MX26LV800T/B offers access time as fast  
as 55ns, allowing operation of high-speed microproces-  
sors without wait states. To eliminate bus contention,  
the MX26LV800T/B has separate chip enable (CE#) and  
output enable (OE#) controls.  
The highest degree of latch-up protection is achieved  
with MXIC's proprietary non-epi process. Latch-up pro-  
tection is proved for stresses up to 100 milliamperes on  
address and data pin from -1V to VCC + 1V.  
MXIC's high speed Flash memories augment EPROM  
functionality with in-circuit electrical erasure and program-  
ming. The MX26LV800T/B uses a command register to  
manage this functionality. The command register allows  
P/N:PM1007  
REV. 1.3, APR. 13, 2005  
1

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