Datasheet > MUN52XXT1

MUN52XXT1

更新时间： 2024-11-23 21:53:23

品牌	Logo	应用领域
安森美 - ONSEMI		晶体晶体管
页数	文件大小	规格书
10页	139K
描述
NPN SILICON BIAS RESISTOR TRANSISTORS

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中文翻译

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MUN52XXT1 数据手册

MUN5211T1 Series

Preferred Devices

Bias Resistor Transistor

NPN Silicon Surface Mount Transistor

with Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The BRT (Bias Resistor

Transistor) contains a single transistor with a monolithic bias network

consisting of two resistors; a series base resistor and a base−emitter

resistor. The BRT eliminates these individual components by

integrating them into a single device. The use of a BRT can reduce

both system cost and board space. The device is housed in the

SC−70/SOT−323 package which is designed for low power

surface mount applications.

http://onsemi.com

NPN SILICON

BIAS RESISTOR

TRANSISTORS

• Simplifies Circuit Design

• Reduces Board Space

PIN 3

COLLECTOR

(OUTPUT)

PIN 1

BASE

(INPUT)

• Reduces Component Count

• The SC−70/SOT−323 package can be soldered using wave or reflow.

The modified gull−winged leads absorb thermal stress during

soldering eliminating the possibility of damage to the die.

• Available in 8 mm embossed tape and reel. Use the Device Number

to order the 7 inch/3000 unit reel.

PIN 2

EMITTER

(GROUND)

• Pb−Free Packages are Available

MARKING DIAGRAM

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

Rating

Collector−Base Voltage

Collector−Emitter Voltage

Collector Current

Symbol

Value

Unit

Vdc

CBO

CEO

SC−70/SOT−323

CASE 419

Vdc

STYLE 3

100

mAdc

THERMAL CHARACTERISTICS

Characteristic

= Specific Device Code

= (See Marking Table)

= Date Code

Symbol

Max

Unit

Total Device Dissipation

202 (Note 1)

310 (Note 2)

1.6 (Note 1)

2.5 (Note 2)

T = 25°C

Derate above 25°C

mW/°C

°C/W

°C

Thermal Resistance −

Junction−to−Ambient

618 (Note 1)

403 (Note 2)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

Thermal Resistance −

Junction−to−Lead

280 (Note 1)

332 (Note 2)

Junction and Storage

Temperature Range

T , T

−55 to +150

stg

DEVICE MARKING INFORMATION

See specific marking information in the device marking table

on page 2 of this data sheet.

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

1. FR−4 @ Minimum Pad.

2. FR−4 @ 1.0 x 1.0 inch Pad.

Preferred devices are recommended choices for future use

and best overall value.



Semiconductor Components Industries, LLC, 2004

Publication Order Number:

November, 2004 − Rev. 6

MUN5211T1/D

12 3 4 5 6 7...10

中文翻译

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与MUN52XXT1相关器件

型号	品牌	获取价格	描述	数据表
MUN5311DW	WEITRON	获取价格	Dual Bias Resistor Transistor NPNPNP Silicon
MUN5311DW	MOTOROLA	获取价格	Dual Bias Resistor Transistors
MUN5311DW1	ONSEMI	获取价格	Complementary Bias Resistor Transistors
MUN5311DW1T1	LRC	获取价格	Dual Bias Resistor Transistors
MUN5311DW1T1	MOTOROLA	获取价格	Dual Bias Resistor Transistors
MUN5311DW1T1	ONSEMI	获取价格	Dual Bias Resistor Transistors
MUN5311DW1T1	ETL	获取价格	Dual Bias Resistor Transistors
MUN5311DW1T1/D	ETC	获取价格	Dual Bias Resistor Transistor
MUN5311DW1T1_05	ONSEMI	获取价格	Dual Bias Resistor Transistors
MUN5311DW1T1G	ONSEMI	获取价格	Dual Bias Resistor Transistors

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