Dual Bias ResistorTransistors
NPN Silicon Surface Mount Transistors
MUN5211DW1T1
Series
with Monolithic Bias Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a base–emitter resistor. These
digital transistors are designed to replace a single device and its external resistor bias network.
The BRT eliminates these individual components by integrating them into a single device. In
the MUN5211DW1T1 series, two BRT devices are housed in the SOT–363 package which
is ideal for low power surface mount applications where board space is at a premium.
• Simplifies Circuit Design
6
5
4
1
2
3
• Reduces Board Space
SOT 363
CASE 419B STYLE1
• Reduces Component Count
• Available in 8 mm, 7 inch/3000 Unit Tape and Reel
6
5
4
MAXIMUM RATINGS (T A = 25°C unless otherwise noted, common for Q 1 and Q 2 )
R1
R2
Q2
Rating
Symbol Value
Unit
Vdc
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
V CBO
V CEO
I C
50
50
R2
Q1
Vdc
R1
100
mAdc
1
2
3
THERMAL CHARACTERISTICS
Characteristic
MARKING DIAGRAM
(One Junction Heated)
Total Device Dissipation
T A = 25°C
Symbol
Max
Unit
6
5
4
P D
187 (Note 1.)
256 (Note 2.)
mW
7X
1.5 (Note 1.)
2.0 (Note 2.)
670 (Note 1.)
490 (Note 2.)
mW/°C
°C/W
Derate above 25°C
1
2
3
Thermal Resistance –
Junction-to-Ambient
R θJA
7X = Device Marking
= (See Page 2)
Characteristic
(Both Junctions Heated)
Symbol
Max
Unit
DEVICE MARKING
INFORMATION
See specific marking information in
the device marking table on page 2 of
this data sheet.
Total Device Dissipation
T A = 25°C
P D
250 (Note 1.)
385 (Note 2.)
2.0 (Note 1.)
3.0 (Note 2.)
mW
Derate above 25°C
mW/°C
Thermal Resistance –
Junction-to-Ambient
Thermal Resistance –
Junction-to-Lead
R θJA
R θJL
493 (Note 1.)
325 (Note 2.)
188 (Note 1.)
208 (Note 2.)
°C/W
°C/W
Junction and Storage
Temperature
T J , T stg
–55 to +150
°C
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
MUN5211dw–1/8