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MT91633AS PDF预览

MT91633AS

更新时间： 2024-01-08 15:22:39
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 光电二极管
页数 文件大小 规格书
17页 121K
描述
Telecom Circuit, 1-Func, PDSO16, SOIC-16

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MT91633AS 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：SOP, SOP16,.4Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.79
JESD-30 代码：R-PDSO-G16JESD-609代码：e0
长度：10.2997 mm功能数量：1
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：5 V
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：Other Telecom ICs标称供电电压：5 V
表面贴装：YES电信集成电路类型：TELECOM CIRCUIT
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.493 mmBase Number Matches：1

MT91633AS 数据手册

 浏览型号MT91633AS的Datasheet PDF文件第4页浏览型号MT91633AS的Datasheet PDF文件第5页浏览型号MT91633AS的Datasheet PDF文件第6页浏览型号MT91633AS的Datasheet PDF文件第8页浏览型号MT91633AS的Datasheet PDF文件第9页浏览型号MT91633AS的Datasheet PDF文件第10页 
Preliminary Information  
MT91633/4  
The Dummy Ringer will add a parallel impedance  
across Tip/Ring and should be taken into account  
when setting Zin. For example, if a dummy ringer of  
17kΩ and 330µF is connected across Tip/Ring and  
an output impedance of 600Ω is required then, Zin  
should be set to 621Ω.  
Supervisory Features  
Line supervision is comprised of  
Output  
State  
Description  
TG/  
0
1
Tip > -4V  
Tip < -16V  
On Hook Transmission  
RG/  
FL/  
0
1
Ring > -4V  
Ring < -16V  
The MT91633/4 has the ability to transmit analog  
signals from Tip and Ring through to VX1+/- when  
on-hook. This can be used when receiving caller line  
identification information.  
0
1
Tip-Ring > +1V  
Tip-Ring < -1V  
RV/  
LVD/  
0-1 pulses  
1
Ringing Det.  
No Ringing  
2-4 Wire Conversion  
0 pulse  
1
Tip-Ring reduced  
Tip-Ring unchanged  
The MT91633/4 converts the balanced 2-Wire input,  
presented by the line at Tip and Ring, to a differential  
signal at VX1+/-.  
These outputs will give a constant indication of the  
state of the connection. FL/ is logic 0 when the Tip  
voltage is more positive than Ring. TG/ detects when  
the Tip lead has been grounded by the far end. RG/  
is similar. LVD/ produces a logic 0 pulse when the  
Tip/Ring voltage reduces in magnitude by more than  
4V. Under certain conditions this can be used for  
parallel phone detection. Alternatively, the LOOP  
output can be used to sense a change in Tip/Ring  
voltage and an external circuit used to determine the  
status of a parallel phone. In any application where  
Conversely, the device converts the differential  
signal input at VR1+ and VR1- to a balanced 2-Wire  
signal at Tip and Ring.  
During full duplex transmission, the signal at Tip and  
Ring consists of both the signal from the device to  
the line and the signal from the line to the device.  
The signal input at VR1+ and VR1- being sent to the  
line, must not appear at the output VX1+/-. In order  
to prevent this, the device has an internal  
cancellation circuit, the measure of this attenuation  
is Transhybrid Loss (THL).  
parallel  
phone  
detection  
is  
required  
full  
characterization is necessary. Some outputs may  
toggle when ringing is applied.  
Loop Output  
Transmit Gain  
The Loop output pin provides a DC voltage  
superimposed on the mid-rail reference voltage of  
Vmid. The DC voltage is directly proportional to the  
DC potential between Tip and Ring but divided by a  
factor of 50, offset by Vmid. This can be used to  
monitor the status of the DC conditions of the line  
from the system side of the isolation barrier. If the  
DC voltage at the Loop pin is greater than Vmid, the  
line is in Forward Loop polarity (Tip more positive  
than Ring). Conversely, a DC voltage at Loop of less  
than Vmid indicates a Reverse Loop condition.  
The Transmit Gain of the MT91633/4 is the gain from  
the differential signal across Tip and Ring to the  
signal at VX1+/-. The internal Transmit Gain of the  
device is fixed as shown in the AC Electrical  
Characteristics table. For the correct gain, the Input  
Impedance of the MT91633/4 must match the  
specified line impedance.  
Receive Gain  
The Receive Gain of the MT91633/4 is the gain from  
the differential signal at VR1+ and VR1- to the  
differential signal across Tip and Ring. The internal  
Receive Gain of the device is fixed as shown in the  
AC Electrical Characteristics table. For the correct  
gain, the Input Impedance of the MT91633/4 must  
match the specified line impedance.  
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