Datasheet > MT9171_06

MT9171_06

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
加拿大卓联 - ZARLINK		网络接口
页数	文件大小	规格书
28页	553K
描述
Digital Subscriber Interface Circuit Digital Network Interface Circuit

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MT9171_06 数据手册

ISO²-CMOS ST-BUS FAMILY MT9171/72

Digital Subscriber Interface Circuit

Digital Network Interface Circuit

Data Sheet

March 2006

Features

•

Full duplex transmission over a single twisted pair

Ordering Information

MT9171/72AE

MT9171/72AN

MT9171/72AP

MT9171/72APR

MT9171/72ANR

MT9171/72AE1

MT9171/72AP1

MT9171/72AN1

22 Pin PDIP

24 Pin SSOP

28 Pin PLCC

24 Pin SSOP

22 Pin PDIP*

28 Pin PLCC*

24 Pin SSOP*

Tubes

Tape & Reel

Tubes

Selectable 80 or 160 kbit/s line rate

Adaptive echo cancellation

Up to 3 km (9171) and 4 km (9172)

ISDN compatible (2B+D) data format

Transparent modem capability

MT9171/72APR1 28 Pin PLCC*

MT9171/72ANR1 24 Pin SSOP*

Tape & Reel

Frame synchronization and clock extraction

Zarlink ST-BUS compatible

*Pb Free Matte Tin

-40°C to +85°C

Low power (typically 50 mW), single 5 V supply

Description

Applications

The MT9171 (DSIC) and MT9172 (DNIC) are pin for

pin compatible replacements for the MT8971 and

MT8972, respectively. They are multi-function devices

capable of providing high speed, full duplex digital

transmission up to 160 kbit/s over a twisted wire pair.

They use adaptive echo-cancelling techniques and

transfer data in (2B+D) format compatible to the ISDN

basic rate. Several modes of operation allow an easy

interface to digital telecommunication networks

including use as a high speed limited distance modem

•

Digital subscriber lines

High speed data transmission over twisted wires

Digital PABX line cards and telephone sets

80 or 160 kbit/s single chip modem

DSTi/Di

Transmit

L_OUT

Differentially

Encoded Biphase

Transmitter

Transmit

Filter &

Line Driver

Prescrambler

Scrambler

Interface

CDSTi/

CDi

L_OUT

DIS

V_Bias

Control

Transmit

Address

Echo Canceller

Error

Signal

Timing

F0/CLD

MUX

Master Clock

Phase Locked

Precan

L_IN

C4/TCK

F0o/RCK

MS0

Echo Estimate

Transmit/

Clock

Receive

Timing &

Control

—

-1

Receive

Filter

DPLL

∑

MS1

MS2

Sync Detect

Receive

RegC

Status

OSC2

OSC1

DSTo/Do

Differentially

Encoded Biphase

Receiver

De-

Prescrambler

Receive

Interface

Descrambler

CDSTo/

CDo

V_DDV_SSV_BiasV_Ref

Figure 1 - Functional Block Diagram

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

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与MT9171_06相关器件

型号	品牌	描述	获取价格	数据表
MT9171AE	MITEL	ISO2-CMOS ST-BUS⑩ FAMILY Digital Subscriber I	获取价格
MT9171AE	ZARLINK	ISO2-CMOS ST-BUS FAMILY	获取价格
MT9171AE	MICROSEMI	Digital SLIC, Basic, 1-Func, CMOS, PDIP22, 0.400 INCH, PLASTIC, DIP-22	获取价格
MT9171AE1	ZARLINK	Digital Subscriber Interface Circuit Digital Network Interface Circuit	获取价格
MT9171AN	MITEL	ISO2-CMOS ST-BUS⑩ FAMILY Digital Subscriber I	获取价格
MT9171AN	ZARLINK	ISO2-CMOS ST-BUS FAMILY	获取价格