Datasheet > MT9162AE

MT9162AE

更新时间： 2024-01-01 17:18:32

品牌	Logo	应用领域
MITEL		解码器编解码器电信集成电路光电二极管
页数	文件大小	规格书
17页	86K
描述
ISO2-CMOS 5 Volt Single Rail Codec

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技术参数
数据手册

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MT9162AE 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	SOP, SOP20,.4	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.77
Is Samacsys：	N	压伸定律：	A/MU-LAW
滤波器：	YES	最大增益公差：	1.6 dB
JESD-30 代码：	R-PDSO-G20	JESD-609代码：	e0
长度：	12.8 mm	线性编码：	NOT AVAILABLE
湿度敏感等级：	1	功能数量：	1
端子数量：	20	工作模式：	SYNCHRONOUS/ASYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP20,.4	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	240
电源：	5 V	认证状态：	Not Qualified
座面最大高度：	2.65 mm	子类别：	Codecs
最大压摆率：	0.01 mA	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
电信集成电路类型：	PROGRAMMABLE CODEC	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	7.5 mm
Base Number Matches：	1

MT9162AE 数据手册

Advance Information

MT9162

Companding law selection for the Filter/Codec is

provided by the A/ µ companding control pin. Table

1 illustrates these choices.

Overview

The 5V single rail Codec features complete Analog/

Digital and Digital/Analog conversion of audio

signals (Filter/Codec) and an analog interface to a

standard analog transmitter and receiver (Analog

Interface). The receiver ampliﬁer is capable of

driving a 20k ohm load.

ITU-T (G.711)

Code

µ -Law

1000 0000

1111 1111

0111 1111

A-Law

+ Full Scale

+ Zero

1010 1010

1101 0101

0101 0101

-Zero

Functional Description

(quiet code)

- Full Scale

0000 0000

0010 1010

Filter/Codec

Table 1: Law Selection

The Filter/Codec block implements conversion of the

analog 0-3.3 kHz speech signals to/from the digital

domain compatible with 64 kb/s PCM B-Channels.

Selection of companding curves and digital code

assignment are programmable. These are ITU-T

G.711 A-law or µ-Law, with true-sign/Alternate Digit

Inversion.

Analog Interfaces

Standard interfaces are provided by the MT9162.

These are:

• The analog inputs (transmitter), pins AIN+/AIN-.

The maximum peak to peak input is 3.667Vpp

µ−law and across AIN+/AIN- 3.8Vpp A-law.

The Filter/Codec block also implements a transmit

audio path gain in the analog domain. Figure 3

depicts the nominal half-channel for the MT9162.

• The analog outputs (receiver), pins AOUT+/

AOUT-.This

internally

compensated

fully

differential output driver is capable of driving a

load of 20k ohms.

The internal architecture is fully differential to provide

the best possible noise rejection as well as to allow a

wide dynamic range from a single 5 volt supply

design. This fully differential architecture is

continued into the analog interface section to provide

full chip realization of these capabilities for the

external functions.

PCM Serial Interface

A serial link is required to transport data between the

MT9162 and an external digital transmission device.

The MT9162 utilizes the strobed data interface found

on many standard Codec devices. This interface is

commonly referred to as Simple Serial Interface

(SSI).

A reference voltage (V ), for the conversion

Ref

requirements of the Codec section, and a bias

voltage (V

), for biasing the internal analog

Bias

sections, are both generated on-chip. V

is also

Bias

brought to an external pin so that it may be used for

biasing external gain setting ampliﬁers. A 0.1µF

The required mode of operation is selected via the

CSL2-0 control pins. See Table 2 for selections

based in CSL2-0 pin settings.

capacitor must be connected from V

ground at all times. Likewise, although V

to analog

may only

Bias

Ref

be used internally, a 0.1µF capacitor from the V

Ref

Quiet Code

pin to ground is required at all times. The analog

ground reference point for these two capacitors must

be physically the same point. To facilitate this the

The PCM serial port can be made to send quiet code

to the decoder and receive ﬁlter path by setting the

RxMute pin high. Likewise, the PCM serial port will

send quiet code in the transmit path when the

and V

pins are situated on adjacent pins.

Ref

Bias

The transmit ﬁlter is designed to meet ITU-T G.714

speciﬁcations. An anti-aliasing ﬁlter is included. This

is a second order lowpass implementation with a

corner frequency at 25 kHz.

The receive ﬁlter is designed to meet ITU-T G.714

speciﬁcations. Filter response is peaked to

compensate for the sinx/x attenuation caused by the

8 kHz sampling rate.

7-163

1 234 5 6 7...17

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与MT9162AE相关器件

型号	品牌	描述	获取价格	数据表
MT9162AN	MITEL	ISO2-CMOS 5 Volt Single Rail Codec	获取价格
MT9162AN	ZARLINK	5 Volt Single Rail Codec	获取价格
MT9162AN1	ZARLINK	5 Volt Single Rail Codec	获取价格
MT9162AS	MITEL	ISO2-CMOS 5 Volt Single Rail Codec	获取价格
MT9162AS	ZARLINK	5 Volt Single Rail Codec	获取价格
MT91633AS	MICROSEMI	Telecom IC, PDSO16,	获取价格

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