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MT9162AS PDF预览

MT9162AS

更新时间: 2024-12-01 04:14:11
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 解码器编解码器电信集成电路电信电路光电二极管
页数 文件大小 规格书
22页 569K
描述
5 Volt Single Rail Codec

MT9162AS 技术参数

是否Rohs认证:不符合生命周期:Transferred
包装说明:SOP, SOP20,.4Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.77
Is Samacsys:N压伸定律:A/MU-LAW
滤波器:YES最大增益公差:1.6 dB
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:12.8 mm线性编码:NOT AVAILABLE
湿度敏感等级:1功能数量:1
端子数量:20工作模式:SYNCHRONOUS/ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):240
电源:5 V认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Codecs
最大压摆率:0.01 mA标称供电电压:5 V
表面贴装:YES技术:CMOS
电信集成电路类型:PROGRAMMABLE CODEC温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

MT9162AS 数据手册

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ISO2-CMOS  
MT9162  
5 Volt Single Rail Codec  
Data Sheet  
May 2006  
Features  
Single 5 volt supply  
Ordering Information  
Programmable µ−law/A-law Codec and filters  
Fully differential output driver  
SSI digital interface  
SSI speed control via external pins CSLO-CSL2  
Individual transmit and receive mute controls  
0 dB gain in receive path  
MT9162AE  
MT9162AS  
MT9162AN  
20 Pin PDIP  
20 Pin SOIC  
Tubes  
Tubes  
20 Pin SSOP Tubes  
MT9162AN1 20 Pin SSOP* Tubes  
*Pb Free Matte Tin  
-40°C to +85°C  
Description  
6 dB gain in transmit path  
The MT9162 5 V single rail Codec incorporates a built-  
in Filter/Codec, transmit anti-alias filter, a reference  
voltage and bias source. The device supports both A-  
law and µ-law requirements.  
Low power operation  
ITU-T G.714 compliant  
Applications  
The analog interface is capable of driving a 20 k ohm  
load.  
The MT9162 is fabricated in Zarlink's ISO2-CMOS  
technology ensuring low power consumption and high  
reliability.  
Cellular radio sets  
Local area communications stations  
Line cards  
FILTER/CODEC GAIN  
AIN+  
AIN-  
VDD  
VSS  
ENCODER  
DECODER  
6dB  
0 dB  
Analog  
Interface  
VBias  
VRef  
AOUT +  
AOUT -  
Din  
Timing  
Dout  
PCM  
Serial  
Interface  
STB  
CLOCKin  
Control  
A/µ  
CSL0 CSL1 CSL2 RXMute TXMute  
IC  
PWRST  
Figure 1 - Functional Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 1999-2006, Zarlink Semiconductor Inc. All Rights Reserved.  

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